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authorVladimir Barinov <vladimir.barinov@cogentembedded.com>2016-11-03 19:08:12 +0100
committerSimon Horman <horms+renesas@verge.net.au>2016-11-21 10:18:49 +0100
commit31e12cb663b0392c9dda1c6edf0c4b22bf15232d (patch)
treec56202528584c8802ec81f0a5a5c524a8b50a807 /arch/arm64
parentarm64: dts: m3ulcb: enable EXTALR clk (diff)
downloadlinux-31e12cb663b0392c9dda1c6edf0c4b22bf15232d.tar.xz
linux-31e12cb663b0392c9dda1c6edf0c4b22bf15232d.zip
arm64: dts: m3ulcb: enable WDT
This supports watchdog timer for M3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
index 5567c46f3753..593d0b4ab31a 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
@@ -90,3 +90,8 @@
clock-frequency = <14745600>;
status = "okay";
};
+
+&wdt0 {
+ timeout-sec = <60>;
+ status = "okay";
+};