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author | Yuan Yao <yao.yuan@nxp.com> | 2017-08-30 12:12:36 +0200 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2017-09-20 16:07:52 +0200 |
commit | 519de51cd5a81a220d7059d1dde184b93a9e591c (patch) | |
tree | 88db6c70a864f34d1d9c1a5a0fa762b9bf6c16c6 /arch/arm64 | |
parent | Linux 4.14-rc1 (diff) | |
download | linux-519de51cd5a81a220d7059d1dde184b93a9e591c.tar.xz linux-519de51cd5a81a220d7059d1dde184b93a9e591c.zip |
arm64: dts: ls1012a: add the DTS node for DSPI support
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64')
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts | 33 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 13 |
2 files changed, 46 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts index 8c013b54db14..cdc4aee75227 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts @@ -93,6 +93,39 @@ }; }; +&dspi { + bus-num = <0>; + status = "okay"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "n25q128a11", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <10000000>; + }; + + flash@1 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "sst25wf040b", "jedec,spi-nor"; + spi-cpol; + spi-cpha; + reg = <1>; + spi-max-frequency = <10000000>; + }; + + flash@2 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "en25s64", "jedec,spi-nor"; + spi-cpol; + spi-cpha; + reg = <2>; + spi-max-frequency = <10000000>; + }; +}; + &duart0 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi index df83915d6ea6..09ce00022728 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi @@ -355,6 +355,19 @@ status = "disabled"; }; + dspi: dspi@2100000 { + compatible = "fsl,ls1012a-dspi", "fsl,ls1021a-v1.0-dspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2100000 0x0 0x10000>; + interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "dspi"; + clocks = <&clockgen 4 0>; + spi-num-chipselects = <5>; + big-endian; + status = "disabled"; + }; + duart0: serial@21c0500 { compatible = "fsl,ns16550", "ns16550a"; reg = <0x00 0x21c0500 0x0 0x100>; |