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| author | Liviu Dudau <Liviu.Dudau@arm.com> | 2015-09-22 18:50:57 +0200 |
|---|---|---|
| committer | Liviu Dudau <Liviu.Dudau@arm.com> | 2015-10-26 11:02:47 +0100 |
| commit | c770d19459a76919ddd4a2573daceba458cb7809 (patch) | |
| tree | 3f32bf0d106cc7e898a0dbc58e5c34bba971b337 /arch/arm64 | |
| parent | Documentation: of: Document the bindings used by Juno R1 PCIe host bridge (diff) | |
| download | linux-c770d19459a76919ddd4a2573daceba458cb7809.tar.xz linux-c770d19459a76919ddd4a2573daceba458cb7809.zip | |
arm64: Juno: Add support for the PCIe host bridge on Juno R1
Juno R1 board sports a functional PCIe host bridge that is
compliant with the SBSA standard found [1] here. With the right
firmware that initialises the XpressRICH3 controller one can
use the generic Host Bridge driver to use the PCIe hardware.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
[1] http://infocenter.arm.com/help/topic/com.arm.doc.den0029a/
Diffstat (limited to 'arch/arm64')
| -rw-r--r-- | arch/arm64/boot/dts/arm/juno-r1.dts | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/arm/juno-r1.dts b/arch/arm64/boot/dts/arm/juno-r1.dts index c62751153a4f..a25964d26bda 100644 --- a/arch/arm64/boot/dts/arm/juno-r1.dts +++ b/arch/arm64/boot/dts/arm/juno-r1.dts @@ -109,6 +109,26 @@ #include "juno-base.dtsi" + pcie-controller@40000000 { + compatible = "arm,juno-r1-pcie", "plda,xpressrich3-axi", "pci-host-ecam-generic"; + device_type = "pci"; + reg = <0 0x40000000 0 0x10000000>; /* ECAM config space */ + bus-range = <0 255>; + linux,pci-domain = <0>; + #address-cells = <3>; + #size-cells = <2>; + dma-coherent; + ranges = <0x01000000 0x00 0x5f800000 0x00 0x5f800000 0x0 0x00800000>, + <0x02000000 0x00 0x50000000 0x00 0x50000000 0x0 0x08000000>, + <0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic 0 0 0 136 4>, + <0 0 0 2 &gic 0 0 0 137 4>, + <0 0 0 3 &gic 0 0 0 138 4>, + <0 0 0 4 &gic 0 0 0 139 4>; + msi-parent = <&v2m_0>; + }; }; &memtimer { |