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authorMarc Zyngier <marc.zyngier@arm.com>2019-04-08 17:49:07 +0200
committerWill Deacon <will.deacon@arm.com>2019-04-30 17:12:54 +0200
commit0ea415390cd345b7d09e8c9ebd4b68adfe873043 (patch)
tree42ee44177c52347a95d17106ce1d89bc87bad7ac /arch/arm64
parentclocksource/arm_arch_timer: Remove use of workaround static key (diff)
downloadlinux-0ea415390cd345b7d09e8c9ebd4b68adfe873043.tar.xz
linux-0ea415390cd345b7d09e8c9ebd4b68adfe873043.zip
clocksource/arm_arch_timer: Use arch_timer_read_counter to access stable counters
Instead of always going via arch_counter_get_cntvct_stable to access the counter workaround, let's have arch_timer_read_counter point to the right method. For that, we need to track whether any CPU in the system has a workaround for the counter. This is done by having an atomic variable tracking this. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/include/asm/arch_timer.h16
1 files changed, 14 insertions, 2 deletions
diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
index 5502ea049b63..48b2100f4aaa 100644
--- a/arch/arm64/include/asm/arch_timer.h
+++ b/arch/arm64/include/asm/arch_timer.h
@@ -174,18 +174,30 @@ static inline void arch_timer_set_cntkctl(u32 cntkctl)
isb();
}
-static inline u64 arch_counter_get_cntpct(void)
+static inline u64 __arch_counter_get_cntpct_stable(void)
{
isb();
return arch_timer_reg_read_stable(cntpct_el0);
}
-static inline u64 arch_counter_get_cntvct(void)
+static inline u64 __arch_counter_get_cntpct(void)
+{
+ isb();
+ return read_sysreg(cntpct_el0);
+}
+
+static inline u64 __arch_counter_get_cntvct_stable(void)
{
isb();
return arch_timer_reg_read_stable(cntvct_el0);
}
+static inline u64 __arch_counter_get_cntvct(void)
+{
+ isb();
+ return read_sysreg(cntvct_el0);
+}
+
static inline int arch_timer_arch_init(void)
{
return 0;