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| author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2016-11-12 14:13:05 +0100 |
|---|---|---|
| committer | Kevin Hilman <khilman@baylibre.com> | 2016-11-16 22:34:04 +0100 |
| commit | a5b1ef3c50aa90214bfd10ede5e3806a9720ccf4 (patch) | |
| tree | ec17dc5d164d64461f13acfe331be695b4e5efcc /arch/arm64 | |
| parent | ARM64: dts: meson-gxbb-vega-s95: Add SD/SDIO/MMC and PWM nodes (diff) | |
| download | linux-a5b1ef3c50aa90214bfd10ede5e3806a9720ccf4.tar.xz linux-a5b1ef3c50aa90214bfd10ede5e3806a9720ccf4.zip | |
ARM64: dts: meson-gxbb: add the USB reset also to the second USB PHY
When the USB PHY driver was introduced the reset framework did not
have support for triggering a reset pulse for shared resets. On GXBB
however there is only one reset line for both PHYs (meaning we have a
shared reset line). With the latest changes to the reset framework and
the corresponding updates to the phy-meson8b-usb2 driver we can now pass
the reset to the second PHY as well.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm64')
| -rw-r--r-- | arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index 160664fd8d63..ac5ad3bf1bd6 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -87,6 +87,7 @@ compatible = "amlogic,meson-gxbb-usb2-phy"; #phy-cells = <0>; reg = <0x0 0xc0000020 0x0 0x20>; + resets = <&reset RESET_USB_OTG>; clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>; clock-names = "usb_general", "usb"; status = "disabled"; |