diff options
| author | Raghavendra Rao Ananta <rananta@google.com> | 2023-08-11 06:51:26 +0200 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2023-08-17 10:40:35 +0200 |
| commit | defc8cc7abf0fcee8d73e440ee02827348d060e0 (patch) | |
| tree | 9092158864af8a9452a777891371e959ff1fa6cd /arch/arm64 | |
| parent | KVM: arm64: Flush only the memslot after write-protect (diff) | |
| download | linux-defc8cc7abf0fcee8d73e440ee02827348d060e0.tar.xz linux-defc8cc7abf0fcee8d73e440ee02827348d060e0.zip | |
KVM: arm64: Invalidate the table entries upon a range
Currently, during the operations such as a hugepage collapse,
KVM would flush the entire VM's context using 'vmalls12e1is'
TLBI operation. Specifically, if the VM is faulting on many
hugepages (say after dirty-logging), it creates a performance
penalty for the guest whose pages have already been faulted
earlier as they would have to refill their TLBs again.
Instead, leverage kvm_tlb_flush_vmid_range() for table entries.
If the system supports it, only the required range will be
flushed. Else, it'll fallback to the previous mechanism.
Signed-off-by: Raghavendra Rao Ananta <rananta@google.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230811045127.3308641-14-rananta@google.com
Diffstat (limited to 'arch/arm64')
| -rw-r--r-- | arch/arm64/kvm/hyp/pgtable.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c index fb58a229b744..1a4af37fd8c0 100644 --- a/arch/arm64/kvm/hyp/pgtable.c +++ b/arch/arm64/kvm/hyp/pgtable.c @@ -806,7 +806,8 @@ static bool stage2_try_break_pte(const struct kvm_pgtable_visit_ctx *ctx, * evicted pte value (if any). */ if (kvm_pte_table(ctx->old, ctx->level)) - kvm_call_hyp(__kvm_tlb_flush_vmid, mmu); + kvm_tlb_flush_vmid_range(mmu, ctx->addr, + kvm_granule_size(ctx->level)); else if (kvm_pte_valid(ctx->old)) kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu, ctx->addr, ctx->level); |