diff options
| author | Victor Kamensky <victor.kamensky@linaro.org> | 2013-10-07 17:48:23 +0200 |
|---|---|---|
| committer | Ben Dooks <ben.dooks@codethink.co.uk> | 2013-10-19 21:46:36 +0200 |
| commit | a1af3474487cc3b8731b990dceac6b6aad7f3ed8 (patch) | |
| tree | d7e4cf3f7f9dcce993510f0a0392d9798999a962 /arch/arm | |
| parent | ARM: mcpm: fix big endian issue in mcpm startup code (diff) | |
| download | linux-a1af3474487cc3b8731b990dceac6b6aad7f3ed8.tar.xz linux-a1af3474487cc3b8731b990dceac6b6aad7f3ed8.zip | |
ARM: tlb: ASID macro should give 32bit result for BE correct operation
In order for ASID macro to be used as expression passed to
inline asm as 'r' operand it needs to give 32 bit unsigned result,
not unsigned 64bit expression.
Otherwise when 64bit ASID is passed to inline assembler statement
as 'r' operand (32bit) compiler behavior is not well specified.
For example when __flush_tlb_mm function compiled in big endian
case, and ASID is passed to tlb_op macro directly, 0 will be passed
as 'mcr 15, 0, r4, cr8, cr3, {2}' argument in r4, unless ASID
macro changed to produce 32 bit result.
Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/include/asm/mmu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h index 6f18da09668b..64fd15159b7d 100644 --- a/arch/arm/include/asm/mmu.h +++ b/arch/arm/include/asm/mmu.h @@ -16,7 +16,7 @@ typedef struct { #ifdef CONFIG_CPU_HAS_ASID #define ASID_BITS 8 #define ASID_MASK ((~0ULL) << ASID_BITS) -#define ASID(mm) ((mm)->context.id.counter & ~ASID_MASK) +#define ASID(mm) ((unsigned int)((mm)->context.id.counter & ~ASID_MASK)) #else #define ASID(mm) (0) #endif |