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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2010-03-11 08:33:46 +0100
committerTony Lindgren <tony@atomide.com>2010-03-11 18:38:53 +0100
commitd660f9a26ef81c3bbced92514ffbe82e1b882ee1 (patch)
tree17997ef37df0ff3a0274b705d5d079531bc601d0 /arch/arm
parentomap2/3/4: ehci: avoid compiler error with touchbook (diff)
downloadlinux-d660f9a26ef81c3bbced92514ffbe82e1b882ee1.tar.xz
linux-d660f9a26ef81c3bbced92514ffbe82e1b882ee1.zip
omap4: Fix build break by moving omap_smc1 into a separate .S
This patch moves omap_smc1 function to a seperate omap44xx-smc.S file and sets compile flags as -Wa,-march=armv7-a. This fix was suggested by Tony Lindgren <tony@atomide.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [tony@atomide.com: otherwise multi-omap build with V6 and V7 breaks] Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-omap2/Makefile3
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c26
-rw-r--r--arch/arm/mach-omap2/omap44xx-smc.S32
3 files changed, 36 insertions, 25 deletions
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 2069fb33baaa..4b9fc57770db 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -22,6 +22,9 @@ obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
# SMP support ONLY available for OMAP4
obj-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o
obj-$(CONFIG_LOCAL_TIMERS) += timer-mpu.o
+obj-$(CONFIG_ARCH_OMAP4) += omap44xx-smc.o
+
+AFLAGS_omap44xx-smc.o :=-Wa,-march=armv7-a
# Functions loaded to SRAM
obj-$(CONFIG_ARCH_OMAP2420) += sram242x.o
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 180ac112e527..b88f28c5814b 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -50,33 +50,9 @@ static struct omap_board_config_kernel sdp4430_config[] __initdata = {
};
#ifdef CONFIG_CACHE_L2X0
-noinline void omap_smc1(u32 fn, u32 arg)
-{
- register u32 r12 asm("r12") = fn;
- register u32 r0 asm("r0") = arg;
-
- /* This is common routine cache secure monitor API used to
- * modify the PL310 secure registers.
- * r0 contains the value to be modified and "r12" contains
- * the monitor API number. It uses few CPU registers
- * internally and hence they need be backed up including
- * link register "lr".
- * Explicitly save r11 and r12 the compiler generated code
- * won't save it.
- */
- asm volatile(
- "stmfd r13!, {r11,r12}\n"
- "dsb\n"
- "smc\n"
- "ldmfd r13!, {r11,r12}\n"
- : "+r" (r0), "+r" (r12)
- :
- : "r4", "r5", "r10", "lr", "cc");
-}
-EXPORT_SYMBOL(omap_smc1);
-
static int __init omap_l2_cache_init(void)
{
+ extern void omap_smc1(u32 fn, u32 arg);
void __iomem *l2cache_base;
/* To avoid code running on other OMAPs in
diff --git a/arch/arm/mach-omap2/omap44xx-smc.S b/arch/arm/mach-omap2/omap44xx-smc.S
new file mode 100644
index 000000000000..89bb2b141473
--- /dev/null
+++ b/arch/arm/mach-omap2/omap44xx-smc.S
@@ -0,0 +1,32 @@
+/*
+ * OMAP44xx secure APIs file.
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ * Written by Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ *
+ * This program is free software,you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/linkage.h>
+
+/*
+ * This is common routine to manage secure monitor API
+ * used to modify the PL310 secure registers.
+ * 'r0' contains the value to be modified and 'r12' contains
+ * the monitor API number. It uses few CPU registers
+ * internally and hence they need be backed up including
+ * link register "lr".
+ * Function signature : void omap_smc1(u32 fn, u32 arg)
+ */
+
+ENTRY(omap_smc1)
+ stmfd sp!, {r2-r12, lr}
+ mov r12, r0
+ mov r0, r1
+ dsb
+ smc
+ ldmfd sp!, {r2-r12, pc}
+END(omap_smc1)