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author | George Cherian <george.cherian@ti.com> | 2014-05-02 08:32:04 +0200 |
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committer | David S. Miller <davem@davemloft.net> | 2014-05-05 19:18:50 +0200 |
commit | de21b26e51d1ab35696b99a29afc30582cfda031 (patch) | |
tree | 8ba8dfc3b5b59768750c5a572700e62745b42d0a /arch/arm | |
parent | ARM: AM43xx: clk: Change the cpts ref clock source to dpll_core_m5 clk (diff) | |
download | linux-de21b26e51d1ab35696b99a29afc30582cfda031.tar.xz linux-de21b26e51d1ab35696b99a29afc30582cfda031.zip |
ARM: dts: am4372: Add clock names for cpsw and cpts
Add CPSW fck and CPTS clock and clock names for AM4372
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/boot/dts/am4372.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index 36d523a26831..c2779f653020 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -489,6 +489,8 @@ #address-cells = <1>; #size-cells = <1>; ti,hwmods = "cpgmac0"; + clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; + clock-names = "fck", "cpts"; status = "disabled"; cpdma_channels = <8>; ale_entries = <1024>; |