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authorYoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>2014-11-12 09:55:57 +0100
committerSimon Horman <horms+renesas@verge.net.au>2014-11-19 01:22:12 +0100
commitdc3cf93d89c525dcaebf4460109196fd9752c706 (patch)
tree8cacdc796273e649fd20ca671ec928a00b054620 /arch/arm
parentARM: shmobile: r8a7794: Add SGX clock to device tree (diff)
downloadlinux-dc3cf93d89c525dcaebf4460109196fd9752c706.tar.xz
linux-dc3cf93d89c525dcaebf4460109196fd9752c706.zip
ARM: shmobile: r8a7794: Add MMP and VSP1 clocks to device tree
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/r8a7794.dtsi14
1 files changed, 9 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index b6f8f451e3b1..19c9de3f2a5a 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -461,15 +461,19 @@
mstp1_clks: mstp1_clks@e6150134 {
compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
- clocks = <&p_clk>, <&zg_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
- <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>;
+ clocks = <&zs_clk>, <&zs_clk>, <&p_clk>, <&zg_clk>, <&zs_clk>,
+ <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, <&cp_clk>,
+ <&zs_clk>, <&zs_clk>;
#clock-cells = <1>;
renesas,clock-indices = <
- R8A7794_CLK_TMU1 R8A7794_CLK_3DG R8A7794_CLK_TMU3
- R8A7794_CLK_TMU2 R8A7794_CLK_CMT0 R8A7794_CLK_TMU0
+ R8A7794_CLK_VCP0 R8A7794_CLK_VPC0 R8A7794_CLK_TMU1
+ R8A7794_CLK_3DG R8A7794_CLK_2DDMAC R8A7794_CLK_FDP1_0
+ R8A7794_CLK_TMU3 R8A7794_CLK_TMU2 R8A7794_CLK_CMT0
+ R8A7794_CLK_TMU0 R8A7794_CLK_VSP1_DU0 R8A7794_CLK_VSP1_S
>;
clock-output-names =
- "tmu1", "3dg", "tmu3", "tmu2", "cmt0", "tmu0";
+ "vcp0", "vpc0", "tmu1", "3dg", "2ddmac", "fdp1-0",
+ "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du0", "vsps";
};
mstp2_clks: mstp2_clks@e6150138 {
compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";