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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-03-15 17:48:08 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-05-30 01:48:03 +0200 |
| commit | cdef8689ef640d5f83e1ac95c6a190f4859c9bf3 (patch) | |
| tree | 2a43ed53894acf7e3423796cbb7fc0c81e7da868 /arch/arm | |
| parent | ARM: l2c: implement fixups for L2 cache controller quirks/errata (diff) | |
| download | linux-cdef8689ef640d5f83e1ac95c6a190f4859c9bf3.tar.xz linux-cdef8689ef640d5f83e1ac95c6a190f4859c9bf3.zip | |
ARM: l2c: clean up L2 cache initialisation messages
Make one of them purely "English", and the other purely technical.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mm/cache-l2x0.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index a544f19c448f..713cdcef25d1 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -545,9 +545,10 @@ static void __init __l2c_init(const struct l2c_init_data *data, outer_cache = fns; - pr_info("%s cache controller enabled\n", type); - pr_info("l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d kB\n", - ways, cache_id, aux, l2x0_size >> 10); + pr_info("%s cache controller enabled, %d ways, %d kB\n", + type, ways, l2x0_size >> 10); + pr_info("%s: CACHE_ID 0x%08x, AUX_CTRL 0x%08x\n", + type, cache_id, aux); } void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask) |