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| author | Sudeep Holla <sudeep.holla@arm.com> | 2019-05-29 15:29:45 +0200 |
|---|---|---|
| committer | Sudeep Holla <sudeep.holla@arm.com> | 2019-05-30 14:39:26 +0200 |
| commit | 6f3710f1f65fdc0da2b042ea6a9a738ddd146d4e (patch) | |
| tree | ad70fa4d0d1832a20938a97ecae4c266d52c0910 /arch/arm | |
| parent | ARM: dts: vexpress-v2p-ca15_a7: update coresight DT bindings (diff) | |
| download | linux-6f3710f1f65fdc0da2b042ea6a9a738ddd146d4e.tar.xz linux-6f3710f1f65fdc0da2b042ea6a9a738ddd146d4e.zip | |
arm: dts: vexpress-v2p-ca15_a7: disable NOR flash node by default
Accessing the NOR flash memory from the kernel will disrupt CPU sleep/
idles states and CPU hotplugging. We need to disable this DT node by
default. Setups that want to access the flash can modify this entry to
enable the flash again but also ensuring to disable CPU idle states and
CPU hotplug.
The platform firmware assumes the flash is always in read mode while
Linux kernel driver leaves NOR flash in "read id" mode after
initialization. If it gets used actively, it can be in some other state.
So far we had not seen this issue as the NOR flash drivers in kernel
were not enabled by default. However it was enable in multi_v7 config by
Commit 5f068190cc10 ("ARM: multi_v7_defconfig: Enable support for CFI NOR FLASH")
So, let's mark the NOR flash disabled so that the platform can boot
again. This based on:
Commit 980bbff018f6 ("ARM64: juno: disable NOR flash node by default")
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 9 |
2 files changed, 10 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi index d3963e9eaf48..1b5bc536c547 100644 --- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi +++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi @@ -30,7 +30,7 @@ #interrupt-cells = <1>; ranges; - flash@0,00000000 { + nor_flash: flash@0,00000000 { compatible = "arm,vexpress-flash", "cfi-flash"; reg = <0 0x00000000 0x04000000>, <4 0x00000000 0x04000000>; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts index 164c904c9992..1de0a658adf1 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts @@ -680,3 +680,12 @@ <0 3 &gic 0 39 4>; }; }; + +&nor_flash { + /* + * Unfortunately, accessing the flash disturbs the CPU idle states + * (suspend) and CPU hotplug of this platform. For this reason, flash + * hardware access is disabled by default on this platform alone. + */ + status = "disabled"; +}; |