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| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2015-08-28 23:08:15 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2015-09-15 11:14:47 +0200 |
| commit | 716d81e3508cad4f8c2fa4e48088646c0a9bbe7d (patch) | |
| tree | 6399488f6a84bce9bb204b40fabd356c05ceb3a2 /arch/arm | |
| parent | ARM: tegra: Rebuild default configuration on v4.3-rc1 (diff) | |
| download | linux-716d81e3508cad4f8c2fa4e48088646c0a9bbe7d.tar.xz linux-716d81e3508cad4f8c2fa4e48088646c0a9bbe7d.zip | |
ARM: tegra: Update default configuration
Update the Tegra default configuration for the following features:
- expose hardware/virtual IRQ mapping via debugfs
- WM9712 audio/touch controller as found on Colibri T20
- sysfs interface for GPIOs
- NFS client support for NFS version 4
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/configs/tegra_defconfig | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig index 48af636934f7..3a36244e3cf6 100644 --- a/arch/arm/configs/tegra_defconfig +++ b/arch/arm/configs/tegra_defconfig @@ -1,5 +1,6 @@ CONFIG_SYSVIPC=y CONFIG_FHANDLE=y +CONFIG_IRQ_DOMAIN_DEBUG=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_IKCONFIG=y @@ -120,6 +121,9 @@ CONFIG_KEYBOARD_CROS_EC=y CONFIG_MOUSE_PS2_ELANTECH=y CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_ATMEL_MXT=y +CONFIG_TOUCHSCREEN_WM97XX=y +# CONFIG_TOUCHSCREEN_WM9705 is not set +# CONFIG_TOUCHSCREEN_WM9713 is not set CONFIG_TOUCHSCREEN_STMPE=y CONFIG_INPUT_MISC=y CONFIG_INPUT_MPU3050=y @@ -141,6 +145,7 @@ CONFIG_SPI_TEGRA20_SFLASH=y CONFIG_SPI_TEGRA20_SLINK=y CONFIG_PINCTRL_AS3722=y CONFIG_PINCTRL_PALMAS=y +CONFIG_GPIO_SYSFS=y CONFIG_GPIO_PCA953X=y CONFIG_GPIO_PCA953X_IRQ=y CONFIG_GPIO_PALMAS=y @@ -207,6 +212,7 @@ CONFIG_SND_SOC_TEGRA=y CONFIG_SND_SOC_TEGRA_RT5640=y CONFIG_SND_SOC_TEGRA_WM8753=y CONFIG_SND_SOC_TEGRA_WM8903=y +CONFIG_SND_SOC_TEGRA_WM9712=y CONFIG_SND_SOC_TEGRA_TRIMSLICE=y CONFIG_SND_SOC_TEGRA_ALC5632=y CONFIG_SND_SOC_TEGRA_MAX98090=y @@ -275,6 +281,7 @@ CONFIG_SQUASHFS=y CONFIG_SQUASHFS_LZO=y CONFIG_SQUASHFS_XZ=y CONFIG_NFS_FS=y +CONFIG_NFS_V4=y CONFIG_ROOT_NFS=y CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ISO8859_1=y |