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authorAlexander Shiyan <shc_work@mail.ru>2013-11-05 15:00:18 +0100
committerShawn Guo <shawn.guo@linaro.org>2013-11-11 15:58:45 +0100
commit036e29918078e38b0b127b89deb4c595028c1bc0 (patch)
tree8134d95cec87175f3ae26a293f14d3117f496f55 /arch/arm
parentARM: imx: set up pllv3 POWER and BYPASS sequentially (diff)
downloadlinux-036e29918078e38b0b127b89deb4c595028c1bc0.tar.xz
linux-036e29918078e38b0b127b89deb4c595028c1bc0.zip
ARM: dts: i.MX51: Fix OTG PHY clock
Proper clock ID for USB OTG PHY is "usb_phy_gate". The patch changes this mismatch. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/imx51.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index f4dcff3a9969..4bcdd3ad15e5 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -190,7 +190,7 @@
usbphy0: usbphy@0 {
compatible = "usb-nop-xceiv";
- clocks = <&clks 124>;
+ clocks = <&clks 75>;
clock-names = "main_clk";
status = "okay";
};