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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-03-08 09:51:13 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-03-08 09:51:13 +0100 |
| commit | 6c634726352f0d796a4b5e6aa9849ee5b45712ce (patch) | |
| tree | 5364dd0ce0aceaa1f4f096641800a6e878c553a2 /arch/arm | |
| parent | ARM: 7344/1: pxa: mainstone: add missing include for IRQ_BOARD_START (diff) | |
| parent | msm: timer: Support sched_clock() (diff) | |
| download | linux-6c634726352f0d796a4b5e6aa9849ee5b45712ce.tar.xz linux-6c634726352f0d796a4b5e6aa9849ee5b45712ce.zip | |
Merge branch 'sched_clock-for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into devel-stable
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-msm/timer.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c index 11d0d8f2656c..61983daa7bba 100644 --- a/arch/arm/mach-msm/timer.c +++ b/arch/arm/mach-msm/timer.c @@ -24,6 +24,7 @@ #include <asm/mach/time.h> #include <asm/hardware/gic.h> #include <asm/localtimer.h> +#include <asm/sched_clock.h> #include <mach/msm_iomap.h> #include <mach/cpu.h> @@ -105,12 +106,12 @@ static union { static void __iomem *source_base; -static cycle_t msm_read_timer_count(struct clocksource *cs) +static notrace cycle_t msm_read_timer_count(struct clocksource *cs) { return readl_relaxed(source_base + TIMER_COUNT_VAL); } -static cycle_t msm_read_timer_count_shift(struct clocksource *cs) +static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs) { /* * Shift timer count down by a constant due to unreliable lower bits @@ -127,6 +128,11 @@ static struct clocksource msm_clocksource = { .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; +static notrace u32 msm_sched_clock_read(void) +{ + return msm_clocksource.read(&msm_clocksource); +} + static void __init msm_timer_init(void) { struct clock_event_device *ce = &msm_clockevent; @@ -189,6 +195,8 @@ err: res = clocksource_register_hz(cs, dgt_hz); if (res) pr_err("clocksource_register failed\n"); + setup_sched_clock(msm_sched_clock_read, + cpu_is_msm7x01() ? 32 - MSM_DGT_SHIFT : 32, dgt_hz); } #ifdef CONFIG_LOCAL_TIMERS |