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authorAndre Przywara <andre.przywara@arm.com>2020-09-07 14:18:31 +0200
committerWei Xu <xuwei5@hisilicon.com>2020-09-14 10:31:06 +0200
commit3328c656663f59382879992419859d73f359ac59 (patch)
treeb04a4ab67b941df7d1e0fe71783e46d4d5607cf2 /arch/arm
parentARM: dts: hisilicon: Fix SP804 users (diff)
downloadlinux-3328c656663f59382879992419859d73f359ac59.tar.xz
linux-3328c656663f59382879992419859d73f359ac59.zip
ARM: dts: hisilicon: Fix SP805 clocks
The SP805 DT binding requires two clocks to be specified, but Hisilicon platform DTs currently only specify one clock. In practice, Linux would pick a clock named "apb_pclk" for the bus clock, and the Linux and U-Boot SP805 driver would use the first clock to derive the actual watchdog counter frequency. Since currently both are the very same clock, we can just double the clock reference, and add the correct clock-names, to match the binding. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/hisi-x5hd2.dtsi5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi
index 3ee7967c202d..e2dbf1d8a67b 100644
--- a/arch/arm/boot/dts/hisi-x5hd2.dtsi
+++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi
@@ -370,8 +370,9 @@
arm,primecell-periphid = <0x00141805>;
reg = <0xa2c000 0x1000>;
interrupts = <0 29 4>;
- clocks = <&clock HIX5HD2_WDG0_RST>;
- clock-names = "apb_pclk";
+ clocks = <&clock HIX5HD2_WDG0_RST>,
+ <&clock HIX5HD2_WDG0_RST>;
+ clock-names = "wdog_clk", "apb_pclk";
};
};