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authorRob Herring <rob.herring@calxeda.com>2013-08-18 03:10:28 +0200
committerRob Herring <rob.herring@calxeda.com>2013-08-23 03:48:42 +0200
commita56a5cf1f2ec895599eace0ac6eba1e4a489e4bf (patch)
tree828c517dc994615f0c3f2301d7c94b7eb00cb5f8 /arch/arm
parentARM: move outer_cache declaration out of ifdef (diff)
downloadlinux-a56a5cf1f2ec895599eace0ac6eba1e4a489e4bf.tar.xz
linux-a56a5cf1f2ec895599eace0ac6eba1e4a489e4bf.zip
ARM: highbank: avoid L2 cache smc calls when PL310 is not present
While Midway firmware handles L2 smc calls as nops, the custom smc calls present a problem when running virtualized Midway guest. They aren't needed so just avoid calling them. In the process, cleanup the L2X0 ifdefs and use IS_ENABLED instead. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-highbank/highbank.c13
1 files changed, 6 insertions, 7 deletions
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index 0749b42f33c9..42ac14bd0b9d 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -65,13 +65,11 @@ void highbank_set_cpu_jump(int cpu, void *jump_addr)
HB_JUMP_TABLE_PHYS(cpu) + 15);
}
-#ifdef CONFIG_CACHE_L2X0
static void highbank_l2x0_disable(void)
{
/* Disable PL310 L2 Cache controller */
highbank_smc1(0x102, 0x0);
}
-#endif
static void __init highbank_init_irq(void)
{
@@ -80,12 +78,13 @@ static void __init highbank_init_irq(void)
if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
highbank_scu_map_io();
-#ifdef CONFIG_CACHE_L2X0
/* Enable PL310 L2 Cache controller */
- highbank_smc1(0x102, 0x1);
- l2x0_of_init(0, ~0UL);
- outer_cache.disable = highbank_l2x0_disable;
-#endif
+ if (IS_ENABLED(CONFIG_CACHE_L2X0) &&
+ of_find_compatible_node(NULL, NULL, "arm,pl310-cache")) {
+ highbank_smc1(0x102, 0x1);
+ l2x0_of_init(0, ~0UL);
+ outer_cache.disable = highbank_l2x0_disable;
+ }
}
static void __init highbank_timer_init(void)