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authorRussell King (Oracle) <rmk+kernel@armlinux.org.uk>2024-11-12 11:16:13 +0100
committerRussell King (Oracle) <rmk+kernel@armlinux.org.uk>2024-11-13 00:51:06 +0100
commitca29cfcc4a21083d671522ad384532e28a43f033 (patch)
treead848160925863dc73993f2915d57dfd500ed60f /arch/arm
parentARM: 9435/1: ARM/nommu: Fix typo "absence" (diff)
downloadlinux-ca29cfcc4a21083d671522ad384532e28a43f033.tar.xz
linux-ca29cfcc4a21083d671522ad384532e28a43f033.zip
ARM: fix cacheflush with PAN
It seems that the cacheflush syscall got broken when PAN for LPAE was implemented. User access was not enabled around the cache maintenance instructions, causing them to fault. Fixes: 7af5b901e847 ("ARM: 9358/2: Implement PAN for LPAE by TTBR0 page table walks disablement") Reported-by: Michał Pecio <michal.pecio@gmail.com> Tested-by: Michał Pecio <michal.pecio@gmail.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/kernel/traps.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 480e307501bb..6ea645939573 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -570,6 +570,7 @@ static int bad_syscall(int n, struct pt_regs *regs)
static inline int
__do_cache_op(unsigned long start, unsigned long end)
{
+ unsigned int ua_flags;
int ret;
do {
@@ -578,7 +579,9 @@ __do_cache_op(unsigned long start, unsigned long end)
if (fatal_signal_pending(current))
return 0;
+ ua_flags = uaccess_save_and_enable();
ret = flush_icache_user_range(start, start + chunk);
+ uaccess_restore(ua_flags);
if (ret)
return ret;