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author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-04-07 21:29:38 +0200 |
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committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-04-07 21:29:38 +0200 |
commit | fa04ccac619085332563fb433ffc4ecc8ba5489e (patch) | |
tree | a551439052effe847d4de6f88e953677f84c597b /arch/arm | |
parent | Linux 5.18-rc1 (diff) | |
download | linux-fa04ccac619085332563fb433ffc4ecc8ba5489e.tar.xz linux-fa04ccac619085332563fb433ffc4ecc8ba5489e.zip |
ARM: dts: nspire: use lower case hex addresses in node unit addresses
Convert all hex addresses in node unit addresses to lower case to fix
dt_binding_check and dtc W=1 warnings.
Conversion was done using sed:
$ sed -e 's/@\([a-zA-Z0-9_-]*\) {/@\L\1 {/' -i arch/arm/boot/dts/nspire*
$ sed -e 's/<0x\([a-zA-Z0-9_-]*\) /<0x\L\1 /g' -i arch/arm/boot/dts/nspire*
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220317115542.450032-2-krzysztof.kozlowski@canonical.com
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/boot/dts/nspire-classic.dtsi | 10 | ||||
-rw-r--r-- | arch/arm/boot/dts/nspire-cx.dts | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/nspire.dtsi | 60 |
3 files changed, 37 insertions, 37 deletions
diff --git a/arch/arm/boot/dts/nspire-classic.dtsi b/arch/arm/boot/dts/nspire-classic.dtsi index 41744cc2bc72..01e1bb7c3c6c 100644 --- a/arch/arm/boot/dts/nspire-classic.dtsi +++ b/arch/arm/boot/dts/nspire-classic.dtsi @@ -17,7 +17,7 @@ &fast_timer { /* compatible = "lsi,zevio-timer"; */ - reg = <0x90010000 0x1000>, <0x900A0010 0x8>; + reg = <0x90010000 0x1000>, <0x900a0010 0x8>; }; &uart { @@ -30,12 +30,12 @@ &timer0 { /* compatible = "lsi,zevio-timer"; */ - reg = <0x900C0000 0x1000>, <0x900A0018 0x8>; + reg = <0x900c0000 0x1000>, <0x900a0018 0x8>; }; &timer1 { compatible = "lsi,zevio-timer"; - reg = <0x900D0000 0x1000>, <0x900A0020 0x8>; + reg = <0x900d0000 0x1000>, <0x900a0020 0x8>; }; &keypad { @@ -66,10 +66,10 @@ #address-cells = <1>; #size-cells = <1>; - intc: interrupt-controller@DC000000 { + intc: interrupt-controller@dc000000 { compatible = "lsi,zevio-intc"; interrupt-controller; - reg = <0xDC000000 0x1000>; + reg = <0xdc000000 0x1000>; #interrupt-cells = <1>; }; }; diff --git a/arch/arm/boot/dts/nspire-cx.dts b/arch/arm/boot/dts/nspire-cx.dts index 0c16b04e2744..590b7dff6ae5 100644 --- a/arch/arm/boot/dts/nspire-cx.dts +++ b/arch/arm/boot/dts/nspire-cx.dts @@ -92,10 +92,10 @@ #address-cells = <1>; #size-cells = <1>; - intc: interrupt-controller@DC000000 { + intc: interrupt-controller@dc000000 { compatible = "arm,pl190-vic"; interrupt-controller; - reg = <0xDC000000 0x1000>; + reg = <0xdc000000 0x1000>; #interrupt-cells = <1>; }; diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi index 90e033d9141f..bb240e6a3a6f 100644 --- a/arch/arm/boot/dts/nspire.dtsi +++ b/arch/arm/boot/dts/nspire.dtsi @@ -20,9 +20,9 @@ reg = <0x00000000 0x80000>; }; - sram: sram@A4000000 { + sram: sram@a4000000 { device = "memory"; - reg = <0xA4000000 0x20000>; + reg = <0xa4000000 0x20000>; }; timer_clk: timer_clk { @@ -33,12 +33,12 @@ base_clk: base_clk { #clock-cells = <0>; - reg = <0x900B0024 0x4>; + reg = <0x900b0024 0x4>; }; ahb_clk: ahb_clk { #clock-cells = <0>; - reg = <0x900B0024 0x4>; + reg = <0x900b0024 0x4>; clocks = <&base_clk>; }; @@ -71,28 +71,28 @@ #size-cells = <1>; ranges; - spi: spi@A9000000 { - reg = <0xA9000000 0x1000>; + spi: spi@a9000000 { + reg = <0xa9000000 0x1000>; }; - usb0: usb@B0000000 { + usb0: usb@b0000000 { compatible = "lsi,zevio-usb"; - reg = <0xB0000000 0x1000>; + reg = <0xb0000000 0x1000>; interrupts = <8>; usb-phy = <&usb_phy>; vbus-supply = <&vbus_reg>; }; - usb1: usb@B4000000 { - reg = <0xB4000000 0x1000>; + usb1: usb@b4000000 { + reg = <0xb4000000 0x1000>; interrupts = <9>; status = "disabled"; }; - lcd: lcd@C0000000 { + lcd: lcd@c0000000 { compatible = "arm,pl111", "arm,primecell"; - reg = <0xC0000000 0x1000>; + reg = <0xc0000000 0x1000>; interrupts = <21>; /* @@ -105,17 +105,17 @@ clock-names = "clcdclk", "apb_pclk"; }; - adc: adc@C4000000 { - reg = <0xC4000000 0x1000>; + adc: adc@c4000000 { + reg = <0xc4000000 0x1000>; interrupts = <11>; }; - tdes: crypto@C8010000 { - reg = <0xC8010000 0x1000>; + tdes: crypto@c8010000 { + reg = <0xc8010000 0x1000>; }; - sha256: crypto@CC000000 { - reg = <0xCC000000 0x1000>; + sha256: crypto@cc000000 { + reg = <0xcc000000 0x1000>; }; apb@90000000 { @@ -143,16 +143,16 @@ interrupts = <1>; }; - timer0: timer@900C0000 { - reg = <0x900C0000 0x1000>; + timer0: timer@900c0000 { + reg = <0x900c0000 0x1000>; clocks = <&timer_clk>, <&timer_clk>, <&timer_clk>; clock-names = "timer0clk", "timer1clk", "apb_pclk"; }; - timer1: timer@900D0000 { - reg = <0x900D0000 0x1000>; + timer1: timer@900d0000 { + reg = <0x900d0000 0x1000>; interrupts = <19>; clocks = <&timer_clk>, <&timer_clk>, <&timer_clk>; @@ -171,18 +171,18 @@ interrupts = <4>; }; - misc: misc@900A0000 { - reg = <0x900A0000 0x1000>; + misc: misc@900a0000 { + reg = <0x900a0000 0x1000>; }; - pwr: pwr@900B0000 { - reg = <0x900B0000 0x1000>; + pwr: pwr@900b0000 { + reg = <0x900b0000 0x1000>; interrupts = <15>; }; - keypad: input@900E0000 { + keypad: input@900e0000 { compatible = "ti,nspire-keypad"; - reg = <0x900E0000 0x1000>; + reg = <0x900e0000 0x1000>; interrupts = <16>; scan-interval = <1000>; @@ -191,8 +191,8 @@ clocks = <&apb_pclk>; }; - contrast: contrast@900F0000 { - reg = <0x900F0000 0x1000>; + contrast: contrast@900f0000 { + reg = <0x900f0000 0x1000>; }; led: led@90110000 { |