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authorLinus Walleij <linus.walleij@linaro.org>2023-12-14 14:15:45 +0100
committerMark Brown <broonie@kernel.org>2023-12-18 15:03:32 +0100
commit26e91f61d6b91ccfb0bbb15cbc81845dd1d223af (patch)
tree9205fe2a5d424462a74c9b85e542f4d094da4533 /arch/arm
parentASoC: simple-card-utils: Drop GPIO include (diff)
downloadlinux-26e91f61d6b91ccfb0bbb15cbc81845dd1d223af.tar.xz
linux-26e91f61d6b91ccfb0bbb15cbc81845dd1d223af.zip
ASoC: tegra: tegra20_ac97: Convert to use GPIO descriptors
The Tegra20 AC97 driver is using the legacy GPIO APIs in <linux/of_gpio.h> and <linux/gpio.h> to obtain GPIOs for reset and sync. Convert it over and fix the polarity error on the RESET line in the process: this reset line is clearly active low. Just fix the one in-tree device tree site using it at the same time. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://msgid.link/r/20231214-gpio-descriptors-sound-misc-v1-4-e3004176bd8b@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi b/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi
index 16b374e6482f..8c1d5c9fa483 100644
--- a/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi
@@ -446,7 +446,7 @@
tegra_ac97: ac97@70002000 {
status = "okay";
nvidia,codec-reset-gpio =
- <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_HIGH>;
+ <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
nvidia,codec-sync-gpio =
<&gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
};