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authorTony Lindgren <tony@atomide.com>2020-03-04 17:10:40 +0100
committerTony Lindgren <tony@atomide.com>2020-03-04 17:10:40 +0100
commit2472a4e00a2993360e2675e6e873b1efe6015710 (patch)
treea68141dfdeabdea8d8116e6d09eddd88afe1614c /arch/arm
parentARM: dts: Configure interconnect target module for omap5 dss (diff)
downloadlinux-2472a4e00a2993360e2675e6e873b1efe6015710.tar.xz
linux-2472a4e00a2993360e2675e6e873b1efe6015710.zip
ARM: dts: Configure interconnect target module for omap5 dispc
We can now probe devices with device tree only configuration using ti-sysc interconnect target module driver. Let's configure the module, but keep the legacy "ti,hwmods" peroperty until the child devices are probing with ti-sysc interconnect driver. Cc: Jyri Sarha <jsarha@ti.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/omap5.dtsi32
1 files changed, 28 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 13798be8ae79..0085befb289e 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -318,13 +318,37 @@
#size-cells = <1>;
ranges = <0 0 0x1000000>;
- dispc@1000 {
- compatible = "ti,omap5-dispc";
- reg = <0x1000 0x1000>;
- interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ target-module@1000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
ti,hwmods = "dss_dispc";
+ reg = <0x1000 0x4>,
+ <0x1010 0x4>,
+ <0x1014 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,sysc-midle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+ SYSC_OMAP2_ENAWAKEUP |
+ SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,syss-mask = <1>;
clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>;
clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x1000 0x1000>;
+
+ dispc@0 {
+ compatible = "ti,omap5-dispc";
+ reg = <0 0x1000>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>;
+ clock-names = "fck";
+ };
};
rfbi: encoder@2000 {