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authorStephen Warren <swarren@nvidia.com>2012-09-19 22:17:24 +0200
committerStephen Warren <swarren@nvidia.com>2012-11-16 20:22:16 +0100
commit73368ba0e168f28ec0b3e689bd428edc92505b62 (patch)
tree5ded0d35584b6c8070f503082581dd6666b65da2 /arch/arm
parentARM: tegra: define DT bindings for and instantiate RTC (diff)
downloadlinux-73368ba0e168f28ec0b3e689bd428edc92505b62.tar.xz
linux-73368ba0e168f28ec0b3e689bd428edc92505b62.zip
ARM: tegra: add TWD to device tree
This will allow timer.c to use twd_local_timer_of_register(), and hence not need to hard-code the TWD address or IRQ. Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi6
-rw-r--r--arch/arm/boot/dts/tegra30.dtsi6
2 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 63c25cefaad7..b8effa1cbda7 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -91,6 +91,12 @@
};
};
+ timer@50004600 {
+ compatible = "arm,cortex-a9-twd-timer";
+ reg = <0x50040600 0x20>;
+ interrupts = <1 13 0x304>;
+ };
+
cache-controller@50043000 {
compatible = "arm,pl310-cache";
reg = <0x50043000 0x1000>;
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index f7af06621cc8..547db83af266 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -91,6 +91,12 @@
};
};
+ timer@50004600 {
+ compatible = "arm,cortex-a9-twd-timer";
+ reg = <0x50040600 0x20>;
+ interrupts = <1 13 0xf04>;
+ };
+
cache-controller@50043000 {
compatible = "arm,pl310-cache";
reg = <0x50043000 0x1000>;