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authorDave Martin <dave.martin@linaro.org>2011-12-12 17:17:34 +0100
committerDave Martin <dave.martin@linaro.org>2011-12-19 14:48:43 +0100
commit22d80379e9b6b167e145c12099705bc8e9946d84 (patch)
tree6c4b774a9c8bd6b842b5eb2ba4c982188fa68a48 /arch/arm
parentomap4: Unconditionally require l2x0 L2 cache controller support (diff)
downloadlinux-22d80379e9b6b167e145c12099705bc8e9946d84.tar.xz
linux-22d80379e9b6b167e145c12099705bc8e9946d84.zip
highbank: Unconditionally require l2x0 L2 cache controller support
If running in the Normal World on a TrustZone-enabled SoC, Linux does not have complete control over the L2 cache controller configuration. The kernel cannot work reliably on such platforms without the l2x0 cache support code built in. This patch unconditionally enables l2x0 support for the Highbank SoC. Thanks to Rob Herring for this suggestion. [1] [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2011-November/074495.html Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Rob Herring <rob.herring@calxeda.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index eca82f9a717a..17921468d1c7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -340,12 +340,12 @@ config ARCH_HIGHBANK
select ARM_AMBA
select ARM_GIC
select ARM_TIMER_SP804
+ select CACHE_L2X0
select CLKDEV_LOOKUP
select CPU_V7
select GENERIC_CLOCKEVENTS
select HAVE_ARM_SCU
select HAVE_SMP
- select MIGHT_HAVE_CACHE_L2X0
select USE_OF
help
Support for the Calxeda Highbank SoC based boards.