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| author | Tony Lindgren <tony@atomide.com> | 2020-03-04 16:25:30 +0100 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2020-03-06 16:20:02 +0100 |
| commit | 0ee89ca32d5b0db9d3e759f7d405d498217a0b67 (patch) | |
| tree | 12bf9a469c3c66707e72d69f4cc8ef159ce66a89 /arch/arm | |
| parent | ARM: dts: Configure interconnect target module for am4 tpcc (diff) | |
| download | linux-0ee89ca32d5b0db9d3e759f7d405d498217a0b67.tar.xz linux-0ee89ca32d5b0db9d3e759f7d405d498217a0b67.zip | |
ARM: dts: Configure interconnect target module for am4 tptc0
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.
Let's also correct the custom node name to use generic node name dma.
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/am4372.dtsi | 26 |
1 files changed, 21 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index fd6b6cb5cf42..17c7a9ae7d95 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -215,12 +215,28 @@ }; }; - edma_tptc0: tptc@49800000 { - compatible = "ti,edma3-tptc"; + target-module@49800000 { + compatible = "ti,sysc-omap4", "ti,sysc"; ti,hwmods = "tptc0"; - reg = <0x49800000 0x100000>; - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "edma3_tcerrint"; + reg = <0x49800000 0x4>, + <0x49800010 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; + ti,sysc-midle = <SYSC_IDLE_FORCE>; + ti,sysc-sidle = <SYSC_IDLE_FORCE>, + <SYSC_IDLE_SMART>; + clocks = <&l3_clkctrl AM4_L3_TPTC0_CLKCTRL 0>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x49800000 0x100000>; + + edma_tptc0: dma@0 { + compatible = "ti,edma3-tptc"; + reg = <0 0x100000>; + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "edma3_tcerrint"; + }; }; edma_tptc1: tptc@49900000 { |