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author | Tony Lindgren <tony@atomide.com> | 2020-03-04 17:10:40 +0100 |
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committer | Tony Lindgren <tony@atomide.com> | 2020-03-04 17:10:40 +0100 |
commit | 5a507162f096b5411cbd6e19d03fef101f83d53f (patch) | |
tree | 0740105b4c935c4e3c6724e4208ea395baa3153a /arch/arm | |
parent | ARM: dts: Configure interconnect target module for omap5 rfbi (diff) | |
download | linux-5a507162f096b5411cbd6e19d03fef101f83d53f.tar.xz linux-5a507162f096b5411cbd6e19d03fef101f83d53f.zip |
ARM: dts: Configure interconnect target module for omap5 dsi1
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module and drop "ti,hwmods" peroperty as this module is a child node
of dispc and has no dependencies to to legacy platform data.
Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/boot/dts/omap5.dtsi | 41 |
1 files changed, 29 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index e1bcbd6c7d4c..8b6f2a076e91 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -378,18 +378,35 @@ }; }; - dsi1: encoder@4000 { - compatible = "ti,omap5-dsi"; - reg = <0x4000 0x200>, - <0x4200 0x40>, - <0x4300 0x40>; - reg-names = "proto", "phy", "pll"; - interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - ti,hwmods = "dss_dsi1"; - clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>, - <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 10>; - clock-names = "fck", "sys_clk"; + target-module@5000 { + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0x5000 0x4>, + <0x5010 0x4>, + <0x5014 0x4>; + reg-names = "rev", "sysc", "syss"; + ti,sysc-sidle = <SYSC_IDLE_FORCE>, + <SYSC_IDLE_NO>, + <SYSC_IDLE_SMART>; + ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | + SYSC_OMAP2_ENAWAKEUP | + SYSC_OMAP2_SOFTRESET | + SYSC_OMAP2_AUTOIDLE)>; + ti,syss-mask = <1>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x5000 0x1000>; + + dsi1: encoder@0 { + compatible = "ti,omap5-dsi"; + reg = <0 0x200>, + <0x200 0x40>, + <0x300 0x40>; + reg-names = "proto", "phy", "pll"; + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>; + clock-names = "fck"; + }; }; dsi2: encoder@9000 { |