diff options
author | Tony Lindgren <tony@atomide.com> | 2015-03-27 18:42:16 +0100 |
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committer | Tony Lindgren <tony@atomide.com> | 2015-03-27 18:42:16 +0100 |
commit | a6b188e50a6ad6fa4d2da163a44f21280cea01c2 (patch) | |
tree | e2ad87718dd1e04b39d8eb385abe30d399286016 /arch/arm | |
parent | ARM: omap-device: add missed callback for suspend-to-disk (diff) | |
parent | ARM: DRA7: hwmod: Fix the hwmod class for GPTimer4 (diff) | |
download | linux-a6b188e50a6ad6fa4d2da163a44f21280cea01c2.tar.xz linux-a6b188e50a6ad6fa4d2da163a44f21280cea01c2.zip |
Merge tag 'for-v4.1/omap-hwmod-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v4.1/soc
OMAP hwmod data changes for AM43xx and DRA7xx for v4.1
Add support for the AM43xx HDQ/1-wire driver and fix the GPTIMER data
for DRA7xx.
Note that I do not have AM43xx nor DRA7xx boards, and cannot test these
patches on those platforms.
Basic build, boot, and PM test logs are available at:
http://www.pwsan.com/omap/testlogs/omap-hwmod-a-for-v4.1/20150324185246/
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 36 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 113 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prcm43xx.h | 1 |
3 files changed, 134 insertions, 16 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c index 8eb85925e444..e2223148ba4d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c @@ -20,6 +20,7 @@ #include "omap_hwmod_33xx_43xx_common_data.h" #include "prcm43xx.h" #include "omap_hwmod_common_data.h" +#include "hdq1w.h" /* IP blocks */ @@ -516,6 +517,33 @@ static struct omap_hwmod am43xx_dss_rfbi_hwmod = { .parent_hwmod = &am43xx_dss_core_hwmod, }; +/* HDQ1W */ +static struct omap_hwmod_class_sysconfig am43xx_hdq1w_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0014, + .syss_offs = 0x0018, + .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class am43xx_hdq1w_hwmod_class = { + .name = "hdq1w", + .sysc = &am43xx_hdq1w_sysc, + .reset = &omap_hdq1w_reset, +}; + +static struct omap_hwmod am43xx_hdq1w_hwmod = { + .name = "hdq1w", + .class = &am43xx_hdq1w_hwmod_class, + .clkdm_name = "l4ls_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = AM43XX_CM_PER_HDQ1W_CLKCTRL_OFFSET, + .modulemode = MODULEMODE_SWCTRL, + }, + }, +}; + /* Interfaces */ static struct omap_hwmod_ocp_if am43xx_l3_main__l4_hs = { .master = &am33xx_l3_main_hwmod, @@ -790,6 +818,13 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__dss_rfbi = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +static struct omap_hwmod_ocp_if am43xx_l4_ls__hdq1w = { + .master = &am33xx_l4_ls_hwmod, + .slave = &am43xx_hdq1w_hwmod, + .clk = "l4ls_gclk", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l4_wkup__synctimer, &am43xx_l4_ls__timer8, @@ -889,6 +924,7 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { &am43xx_l4_ls__dss, &am43xx_l4_ls__dss_dispc, &am43xx_l4_ls__dss_rfbi, + &am43xx_l4_ls__hdq1w, NULL, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index e8692e7675b8..701234d8db1b 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c @@ -1763,21 +1763,6 @@ static struct omap_hwmod_class dra7xx_timer_1ms_hwmod_class = { .sysc = &dra7xx_timer_1ms_sysc, }; -static struct omap_hwmod_class_sysconfig dra7xx_timer_secure_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_RESET_STATUS | - SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type2, -}; - -static struct omap_hwmod_class dra7xx_timer_secure_hwmod_class = { - .name = "timer", - .sysc = &dra7xx_timer_secure_sysc, -}; - static struct omap_hwmod_class_sysconfig dra7xx_timer_sysc = { .rev_offs = 0x0000, .sysc_offs = 0x0010, @@ -1841,7 +1826,7 @@ static struct omap_hwmod dra7xx_timer3_hwmod = { /* timer4 */ static struct omap_hwmod dra7xx_timer4_hwmod = { .name = "timer4", - .class = &dra7xx_timer_secure_hwmod_class, + .class = &dra7xx_timer_hwmod_class, .clkdm_name = "l4per_clkdm", .main_clk = "timer4_gfclk_mux", .prcm = { @@ -1958,6 +1943,66 @@ static struct omap_hwmod dra7xx_timer11_hwmod = { }, }; +/* timer13 */ +static struct omap_hwmod dra7xx_timer13_hwmod = { + .name = "timer13", + .class = &dra7xx_timer_hwmod_class, + .clkdm_name = "l4per3_clkdm", + .main_clk = "timer13_gfclk_mux", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4PER3_TIMER13_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4PER3_TIMER13_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, + }, + }, +}; + +/* timer14 */ +static struct omap_hwmod dra7xx_timer14_hwmod = { + .name = "timer14", + .class = &dra7xx_timer_hwmod_class, + .clkdm_name = "l4per3_clkdm", + .main_clk = "timer14_gfclk_mux", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4PER3_TIMER14_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4PER3_TIMER14_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, + }, + }, +}; + +/* timer15 */ +static struct omap_hwmod dra7xx_timer15_hwmod = { + .name = "timer15", + .class = &dra7xx_timer_hwmod_class, + .clkdm_name = "l4per3_clkdm", + .main_clk = "timer15_gfclk_mux", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4PER3_TIMER15_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4PER3_TIMER15_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, + }, + }, +}; + +/* timer16 */ +static struct omap_hwmod dra7xx_timer16_hwmod = { + .name = "timer16", + .class = &dra7xx_timer_hwmod_class, + .clkdm_name = "l4per3_clkdm", + .main_clk = "timer16_gfclk_mux", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4PER3_TIMER16_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4PER3_TIMER16_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, + }, + }, +}; + /* * 'uart' class * @@ -3112,6 +3157,38 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per1__timer11 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +/* l4_per3 -> timer13 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__timer13 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_timer13_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> timer14 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__timer14 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_timer14_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> timer15 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__timer15 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_timer15_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> timer16 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__timer16 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_timer16_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + /* l4_per1 -> uart1 */ static struct omap_hwmod_ocp_if dra7xx_l4_per1__uart1 = { .master = &dra7xx_l4_per1_hwmod, @@ -3350,6 +3427,10 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = { &dra7xx_l4_per1__timer9, &dra7xx_l4_per1__timer10, &dra7xx_l4_per1__timer11, + &dra7xx_l4_per3__timer13, + &dra7xx_l4_per3__timer14, + &dra7xx_l4_per3__timer15, + &dra7xx_l4_per3__timer16, &dra7xx_l4_per1__uart1, &dra7xx_l4_per1__uart2, &dra7xx_l4_per1__uart3, diff --git a/arch/arm/mach-omap2/prcm43xx.h b/arch/arm/mach-omap2/prcm43xx.h index ad7b3e9977f8..48df3b55057e 100644 --- a/arch/arm/mach-omap2/prcm43xx.h +++ b/arch/arm/mach-omap2/prcm43xx.h @@ -143,5 +143,6 @@ #define AM43XX_CM_PER_USB_OTG_SS1_CLKCTRL_OFFSET 0x0268 #define AM43XX_CM_PER_USBPHYOCP2SCP1_CLKCTRL_OFFSET 0x05C0 #define AM43XX_CM_PER_DSS_CLKCTRL_OFFSET 0x0a20 +#define AM43XX_CM_PER_HDQ1W_CLKCTRL_OFFSET 0x04a0 #endif |