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authorTony Lindgren <tony@atomide.com>2012-09-05 02:22:45 +0200
committerTony Lindgren <tony@atomide.com>2012-09-05 02:22:45 +0200
commite534e871a94ba2e3bfdf0edd3685eb805fc960d8 (patch)
treeddbfab0d7354bf6d26c78120bf2864f585f7fa49 /arch/arm
parentLinux 3.6-rc4 (diff)
downloadlinux-e534e871a94ba2e3bfdf0edd3685eb805fc960d8.tar.xz
linux-e534e871a94ba2e3bfdf0edd3685eb805fc960d8.zip
ARM: OMAP4: Fix array size for irq_target_cpu
If NR_IRQS is less than MAX_IRQS, we end up writing past the irq_target_cpu array in omap_wakeupgen_init(): /* Associate all the IRQs to boot CPU like GIC init does. */ for (i = 0; i < max_irqs; i++) irq_target_cpu[i] = boot_cpu; This can happen if SPARSE_IRQ is enabled as by default NR_IRQS is set to 16. Without this patch we're overwriting other data during the boot. Looks like a similar fix was posted by Benoit Cousson earlier as "ARM: OMAP2+: wakeupgen: Fix wrong array size for irq_target_cpu" but was lost. Cc: stable@vger.kernel.org Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-omap2/omap-wakeupgen.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index 05fdebfaa195..330d4c6e746b 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -46,7 +46,7 @@
static void __iomem *wakeupgen_base;
static void __iomem *sar_base;
static DEFINE_SPINLOCK(wakeupgen_lock);
-static unsigned int irq_target_cpu[NR_IRQS];
+static unsigned int irq_target_cpu[MAX_IRQS];
static unsigned int irq_banks = MAX_NR_REG_BANKS;
static unsigned int max_irqs = MAX_IRQS;
static unsigned int omap_secure_apis;