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author | Ingo Molnar <mingo@elte.hu> | 2009-01-11 03:43:52 +0100 |
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committer | Ingo Molnar <mingo@elte.hu> | 2009-01-11 03:43:52 +0100 |
commit | 99cd7074891f87c49660e3b2880564324a4733ac (patch) | |
tree | 903d2665bcb445f1f265d1adf7a99f265bcefc15 /arch/avr32/Kconfig | |
parent | trace: clean up funny line breaks in stat_seq_show (diff) | |
parent | Linux 2.6.29-rc1 (diff) | |
download | linux-99cd7074891f87c49660e3b2880564324a4733ac.tar.xz linux-99cd7074891f87c49660e3b2880564324a4733ac.zip |
Merge commit 'v2.6.29-rc1' into tracing/urgent
Diffstat (limited to 'arch/avr32/Kconfig')
-rw-r--r-- | arch/avr32/Kconfig | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig index 26eca87f6735..b189680d18b0 100644 --- a/arch/avr32/Kconfig +++ b/arch/avr32/Kconfig @@ -122,6 +122,24 @@ config BOARD_ATNGW100 bool "ATNGW100 Network Gateway" select CPU_AT32AP7000 +config BOARD_HAMMERHEAD + bool "Hammerhead board" + select CPU_AT32AP7000 + select USB_ARCH_HAS_HCD + help + The Hammerhead platform is built around a AVR32 32-bit microcontroller from Atmel. + It offers versatile peripherals, such as ethernet, usb device, usb host etc. + + The board also incooperates a power supply and is a Power over Ethernet (PoE) Powered + Device (PD). + + Additonally, a Cyclone III FPGA from Altera is integrated on the board. The FPGA is + mapped into the 32-bit AVR memory bus. The FPGA offers two DDR2 SDRAM interfaces, which + will cover even the most exceptional need of memory bandwidth. Together with the onboard + video decoder the board is ready for video processing. + + For more information see: http://www.miromico.com/hammerhead + config BOARD_FAVR_32 bool "Favr-32 LCD-board" select CPU_AT32AP7000 @@ -133,6 +151,7 @@ endchoice source "arch/avr32/boards/atstk1000/Kconfig" source "arch/avr32/boards/atngw100/Kconfig" +source "arch/avr32/boards/hammerhead/Kconfig" source "arch/avr32/boards/favr-32/Kconfig" choice |