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| author | Mike Frysinger <vapier@gentoo.org> | 2009-06-29 20:20:10 +0200 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2009-07-16 07:52:24 +0200 |
| commit | fb4b5d3a379824d94fd71fc1aa78e9dbcb15b948 (patch) | |
| tree | 104b640b09ebbc58f4eb3b67fd190bf7bf9a3912 /arch/avr32/boards | |
| parent | Blackfin: fix miscompilation in lshrdi3 (diff) | |
| download | linux-fb4b5d3a379824d94fd71fc1aa78e9dbcb15b948.tar.xz linux-fb4b5d3a379824d94fd71fc1aa78e9dbcb15b948.zip | |
Blackfin: handle BF561 Core B memory regions better when SMP=n
Rather than assume Core B is always run with caches turned on, let people
load into any of the on-chip memory regions. It is their business how the
SRAM/Cache regions are utilized, so don't prevent them from being able to
load into them.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/avr32/boards')
0 files changed, 0 insertions, 0 deletions