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authorJie Zhang <jie.zhang@analog.com>2009-06-16 11:48:33 +0200
committerMike Frysinger <vapier@gentoo.org>2009-06-23 03:15:59 +0200
commit41ba653f24a39a0e6a4afe9b2763a95a57e042c2 (patch)
tree43eb086046d4eef764878e04512ddd215ca8845b /arch/blackfin/include/asm/cache.h
parentBlackfin: update I-pipe patch level (diff)
downloadlinux-41ba653f24a39a0e6a4afe9b2763a95a57e042c2.tar.xz
linux-41ba653f24a39a0e6a4afe9b2763a95a57e042c2.zip
Blackfin: decouple unrelated cache settings to get exact behavior
The current cache options don't really represent the hardware features. They end up setting different aspects of the hardware so that the end result is to turn on/off the cache. Unfortunately, when we hit cache problems with the hardware, it's difficult to test different settings to root cause the problem. The current settings also don't cleanly allow for different caching behaviors with different regions of memory. So split the configure options such that they properly reflect the settings that are applied to the hardware. Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/include/asm/cache.h')
-rw-r--r--arch/blackfin/include/asm/cache.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/blackfin/include/asm/cache.h b/arch/blackfin/include/asm/cache.h
index 2ef669ed9222..477050ad5c53 100644
--- a/arch/blackfin/include/asm/cache.h
+++ b/arch/blackfin/include/asm/cache.h
@@ -35,10 +35,10 @@
#if defined(CONFIG_SMP) && \
!defined(CONFIG_BFIN_CACHE_COHERENT)
-# if defined(CONFIG_BFIN_ICACHE)
+# if defined(CONFIG_BFIN_ICACHEABLE) || defined(CONFIG_BFIN_L2_ICACHEABLE)
# define __ARCH_SYNC_CORE_ICACHE
# endif
-# if defined(CONFIG_BFIN_DCACHE)
+# if defined(CONFIG_BFIN_DCACHEABLE) || defined(CONFIG_BFIN_L2_DCACHEABLE)
# define __ARCH_SYNC_CORE_DCACHE
# endif
#ifndef __ASSEMBLY__