summaryrefslogtreecommitdiffstats
path: root/arch/blackfin/include/asm/cache.h
diff options
context:
space:
mode:
authorBryan Wu <cooloney@kernel.org>2008-08-27 04:51:02 +0200
committerBryan Wu <cooloney@kernel.org>2008-08-27 04:51:02 +0200
commit639f6571458948b5112be2cf00c0c2c04db2897d (patch)
treea4dd7af33d0e92c935ba1e904f6fb7e923ac825e /arch/blackfin/include/asm/cache.h
parentBlackfin arch: fix bug - MPU crashes under stress (diff)
downloadlinux-639f6571458948b5112be2cf00c0c2c04db2897d.tar.xz
linux-639f6571458948b5112be2cf00c0c2c04db2897d.zip
Blackfin arch: move include/asm-blackfin header files to arch/blackfin
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/include/asm/cache.h')
-rw-r--r--arch/blackfin/include/asm/cache.h29
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/blackfin/include/asm/cache.h b/arch/blackfin/include/asm/cache.h
new file mode 100644
index 000000000000..023d72133b5a
--- /dev/null
+++ b/arch/blackfin/include/asm/cache.h
@@ -0,0 +1,29 @@
+/*
+ * include/asm-blackfin/cache.h
+ */
+#ifndef __ARCH_BLACKFIN_CACHE_H
+#define __ARCH_BLACKFIN_CACHE_H
+
+/*
+ * Bytes per L1 cache line
+ * Blackfin loads 32 bytes for cache
+ */
+#define L1_CACHE_SHIFT 5
+#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
+#define SMP_CACHE_BYTES L1_CACHE_BYTES
+
+/*
+ * Put cacheline_aliged data to L1 data memory
+ */
+#ifdef CONFIG_CACHELINE_ALIGNED_L1
+#define __cacheline_aligned \
+ __attribute__((__aligned__(L1_CACHE_BYTES), \
+ __section__(".data_l1.cacheline_aligned")))
+#endif
+
+/*
+ * largest L1 which this arch supports
+ */
+#define L1_CACHE_SHIFT_MAX 5
+
+#endif