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authorGraf Yang <graf.yang@analog.com>2008-11-18 10:48:22 +0100
committerBryan Wu <cooloney@kernel.org>2008-11-18 10:48:22 +0100
commitb8a989893cbdeb6c97a7b5af5f38fb0e480235f9 (patch)
tree658cf6df93dac687f0d6b94111d0f53b3dd0177c /arch/blackfin/kernel/cplb-nompu/cacheinit.c
parentBlackfin arch: SMP supporting patchset: Blackfin header files and machine com... (diff)
downloadlinux-b8a989893cbdeb6c97a7b5af5f38fb0e480235f9.tar.xz
linux-b8a989893cbdeb6c97a7b5af5f38fb0e480235f9.zip
Blackfin arch: SMP supporting patchset: Blackfin CPLB related code
Blackfin dual core BF561 processor can support SMP like features. https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like In this patch, we provide SMP extend to Blackfin CPLB related code Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/kernel/cplb-nompu/cacheinit.c')
-rw-r--r--arch/blackfin/kernel/cplb-nompu/cacheinit.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/blackfin/kernel/cplb-nompu/cacheinit.c b/arch/blackfin/kernel/cplb-nompu/cacheinit.c
index bd0831592c2c..3a385aec67d5 100644
--- a/arch/blackfin/kernel/cplb-nompu/cacheinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cacheinit.c
@@ -25,9 +25,9 @@
#include <asm/cplbinit.h>
#if defined(CONFIG_BFIN_ICACHE)
-void __init bfin_icache_init(void)
+void __cpuinit bfin_icache_init(u_long icplb[])
{
- unsigned long *table = icplb_table;
+ unsigned long *table = icplb;
unsigned long ctrl;
int i;
@@ -47,9 +47,9 @@ void __init bfin_icache_init(void)
#endif
#if defined(CONFIG_BFIN_DCACHE)
-void __init bfin_dcache_init(void)
+void __cpuinit bfin_dcache_init(u_long dcplb[])
{
- unsigned long *table = dcplb_table;
+ unsigned long *table = dcplb;
unsigned long ctrl;
int i;
@@ -64,6 +64,7 @@ void __init bfin_dcache_init(void)
ctrl = bfin_read_DMEM_CONTROL();
ctrl |= DMEM_CNTR;
bfin_write_DMEM_CONTROL(ctrl);
+
SSYNC();
}
#endif