diff options
author | Michael Hennerich <michael.hennerich@analog.com> | 2008-05-17 10:38:52 +0200 |
---|---|---|
committer | Bryan Wu <cooloney@kernel.org> | 2008-05-17 10:38:52 +0200 |
commit | 59069676383c6446f50555e04aed7f51d5de695e (patch) | |
tree | ea0a34fda1ae463dad6f11f92773f515e4c1a34f /arch/blackfin/lib/ins.S | |
parent | Blackfin arch: enable a choice to provide 4M DMA memory (diff) | |
download | linux-59069676383c6446f50555e04aed7f51d5de695e.tar.xz linux-59069676383c6446f50555e04aed7f51d5de695e.zip |
Blackfin arch: IO Port functions to read/write unalligned memory
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/lib/ins.S')
-rw-r--r-- | arch/blackfin/lib/ins.S | 21 |
1 files changed, 18 insertions, 3 deletions
diff --git a/arch/blackfin/lib/ins.S b/arch/blackfin/lib/ins.S index df7b8833a0c5..eba2343b1b59 100644 --- a/arch/blackfin/lib/ins.S +++ b/arch/blackfin/lib/ins.S @@ -7,7 +7,7 @@ * Description: Implementation of ins{bwl} for BlackFin processors using zero overhead loops. * * Modified: - * Copyright 2004-2006 Analog Devices Inc. + * Copyright 2004-2008 Analog Devices Inc. * Copyright (C) 2005 Bas Vermeulen, BuyWays BV <bas@buyways.nl> * * Bugs: Enter bugs at http://blackfin.uclinux.org/ @@ -63,6 +63,23 @@ ENTRY(_insw) RTS; ENDPROC(_insw) +ENTRY(_insw_8) + P0 = R0; /* P0 = port */ + cli R3; + P1 = R1; /* P1 = address */ + P2 = R2; /* P2 = count */ + SSYNC; + LSETUP( .Lword8_loop_s, .Lword8_loop_e) LC0 = P2; +.Lword8_loop_s: R0 = W[P0]; + B[P1++] = R0; + R0 = R0 >> 8; + B[P1++] = R0; + NOP; +.Lword8_loop_e: NOP; + sti R3; + RTS; +ENDPROC(_insw_8) + ENTRY(_insb) P0 = R0; /* P0 = port */ cli R3; @@ -78,8 +95,6 @@ ENTRY(_insb) RTS; ENDPROC(_insb) - - ENTRY(_insl_16) P0 = R0; /* P0 = port */ cli R3; |