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author | Mike Frysinger <vapier@gentoo.org> | 2009-10-15 06:13:29 +0200 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2010-10-22 09:48:27 +0200 |
commit | 3d6437b35d68836b6ec4d45a24dfdafc61a27a84 (patch) | |
tree | d0c4eb6f11fc9f6c5317c6b3a348711ee2c5ec8f /arch/blackfin/mach-bf538 | |
parent | Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/pow... (diff) | |
download | linux-3d6437b35d68836b6ec4d45a24dfdafc61a27a84.tar.xz linux-3d6437b35d68836b6ec4d45a24dfdafc61a27a84.zip |
Blackfin: punt short SPI MMR bit names
Now that the common header defines everything and the SPI drivers are
using it, we can drop these duplicated global namespace polluters.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf538')
-rw-r--r-- | arch/blackfin/mach-bf538/include/mach/defBF539.h | 72 |
1 files changed, 0 insertions, 72 deletions
diff --git a/arch/blackfin/mach-bf538/include/mach/defBF539.h b/arch/blackfin/mach-bf538/include/mach/defBF539.h index fe43062b4975..72e17ec147ca 100644 --- a/arch/blackfin/mach-bf538/include/mach/defBF539.h +++ b/arch/blackfin/mach-bf538/include/mach/defBF539.h @@ -1894,78 +1894,6 @@ #define PE14_P 0xE #define PE15_P 0xF - -/* *********** SERIAL PERIPHERAL INTERFACE (SPI) MASKS **************** */ -/* SPIx_CTL Masks */ -#define TIMOD 0x0003 /* Transfer Initiate Mode */ -#define RDBR_CORE 0x0000 /* RDBR Read Initiates, IRQ When RDBR Full */ -#define TDBR_CORE 0x0001 /* TDBR Write Initiates, IRQ When TDBR Empty */ -#define RDBR_DMA 0x0002 /* DMA Read, DMA Until FIFO Empty */ -#define TDBR_DMA 0x0003 /* DMA Write, DMA Until FIFO Full */ -#define SZ 0x0004 /* Send Zero (When TDBR Empty, Send Zero/Last*) */ -#define GM 0x0008 /* Get More (When RDBR Full, Overwrite/Discard*) */ -#define PSSE 0x0010 /* Slave-Select Input Enable */ -#define EMISO 0x0020 /* Enable MISO As Output */ -#define SIZE 0x0100 /* Size of Words (16/8* Bits) */ -#define LSBF 0x0200 /* LSB First */ -#define CPHA 0x0400 /* Clock Phase */ -#define CPOL 0x0800 /* Clock Polarity */ -#define MSTR 0x1000 /* Master/Slave* */ -#define WOM 0x2000 /* Write Open Drain Master */ -#define SPE 0x4000 /* SPI Enable */ - -/* SPIx_FLG Masks */ -#define FLS1 0x0002 /* Enables (=1) SPI_FLOUT1 as flag output for SPI Slave-select */ -#define FLS2 0x0004 /* Enables (=1) SPI_FLOUT2 as flag output for SPI Slave-select */ -#define FLS3 0x0008 /* Enables (=1) SPI_FLOUT3 as flag output for SPI Slave-select */ -#define FLS4 0x0010 /* Enables (=1) SPI_FLOUT4 as flag output for SPI Slave-select */ -#define FLS5 0x0020 /* Enables (=1) SPI_FLOUT5 as flag output for SPI Slave-select */ -#define FLS6 0x0040 /* Enables (=1) SPI_FLOUT6 as flag output for SPI Slave-select */ -#define FLS7 0x0080 /* Enables (=1) SPI_FLOUT7 as flag output for SPI Slave-select */ - -#define FLG1 0x0200 /* Activates (=0) SPI_FLOUT1 as flag output for SPI Slave-select */ -#define FLG2 0x0400 /* Activates (=0) SPI_FLOUT2 as flag output for SPI Slave-select */ -#define FLG3 0x0800 /* Activates (=0) SPI_FLOUT3 as flag output for SPI Slave-select */ -#define FLG4 0x1000 /* Activates (=0) SPI_FLOUT4 as flag output for SPI Slave-select */ -#define FLG5 0x2000 /* Activates (=0) SPI_FLOUT5 as flag output for SPI Slave-select */ -#define FLG6 0x4000 /* Activates (=0) SPI_FLOUT6 as flag output for SPI Slave-select */ -#define FLG7 0x8000 /* Activates (=0) SPI_FLOUT7 as flag output for SPI Slave-select */ - -/* SPIx_FLG Bit Positions */ -#define FLS1_P 0x0001 /* Enables (=1) SPI_FLOUT1 as flag output for SPI Slave-select */ -#define FLS2_P 0x0002 /* Enables (=1) SPI_FLOUT2 as flag output for SPI Slave-select */ -#define FLS3_P 0x0003 /* Enables (=1) SPI_FLOUT3 as flag output for SPI Slave-select */ -#define FLS4_P 0x0004 /* Enables (=1) SPI_FLOUT4 as flag output for SPI Slave-select */ -#define FLS5_P 0x0005 /* Enables (=1) SPI_FLOUT5 as flag output for SPI Slave-select */ -#define FLS6_P 0x0006 /* Enables (=1) SPI_FLOUT6 as flag output for SPI Slave-select */ -#define FLS7_P 0x0007 /* Enables (=1) SPI_FLOUT7 as flag output for SPI Slave-select */ -#define FLG1_P 0x0009 /* Activates (=0) SPI_FLOUT1 as flag output for SPI Slave-select */ -#define FLG2_P 0x000A /* Activates (=0) SPI_FLOUT2 as flag output for SPI Slave-select */ -#define FLG3_P 0x000B /* Activates (=0) SPI_FLOUT3 as flag output for SPI Slave-select */ -#define FLG4_P 0x000C /* Activates (=0) SPI_FLOUT4 as flag output for SPI Slave-select */ -#define FLG5_P 0x000D /* Activates (=0) SPI_FLOUT5 as flag output for SPI Slave-select */ -#define FLG6_P 0x000E /* Activates (=0) SPI_FLOUT6 as flag output for SPI Slave-select */ -#define FLG7_P 0x000F /* Activates (=0) SPI_FLOUT7 as flag output for SPI Slave-select */ - -/* SPIx_STAT Masks */ -#define SPIF 0x0001 /* Set (=1) when SPI single-word transfer complete */ -#define MODF 0x0002 /* Set (=1) in a master device when some other device tries to become master */ -#define TXE 0x0004 /* Set (=1) when transmission occurs with no new data in SPI_TDBR */ -#define TXS 0x0008 /* SPI_TDBR Data Buffer Status (0=Empty, 1=Full) */ -#define RBSY 0x0010 /* Set (=1) when data is received with RDBR full */ -#define RXS 0x0020 /* SPI_RDBR Data Buffer Status (0=Empty, 1=Full) */ -#define TXCOL 0x0040 /* When set (=1), corrupt data may have been transmitted */ - -/* SPIx_FLG Masks */ -#define FLG1E 0xFDFF /* Activates SPI_FLOUT1 */ -#define FLG2E 0xFBFF /* Activates SPI_FLOUT2 */ -#define FLG3E 0xF7FF /* Activates SPI_FLOUT3 */ -#define FLG4E 0xEFFF /* Activates SPI_FLOUT4 */ -#define FLG5E 0xDFFF /* Activates SPI_FLOUT5 */ -#define FLG6E 0xBFFF /* Activates SPI_FLOUT6 */ -#define FLG7E 0x7FFF /* Activates SPI_FLOUT7 */ - - /* ********************* ASYNCHRONOUS MEMORY CONTROLLER MASKS ************* */ /* EBIU_AMGCTL Masks */ #define AMCKEN 0x0001 /* Enable CLKOUT */ |