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authorMichael Hennerich <michael.hennerich@analog.com>2007-07-12 10:17:18 +0200
committerBryan Wu <bryan.wu@analog.com>2007-07-12 10:17:18 +0200
commit34e0fc89bdc1e6f50032dc43ed23167f5dbad6da (patch)
treeb76cb79b0e2b7254b0942de510c1ce459df83567 /arch/blackfin/mach-bf548/Kconfig
parentBlackfin arch: cleanup warnings from checkpatch -- no functional changes (diff)
downloadlinux-34e0fc89bdc1e6f50032dc43ed23167f5dbad6da.tar.xz
linux-34e0fc89bdc1e6f50032dc43ed23167f5dbad6da.zip
Blackfin arch: Enable BF54x PIN/GPIO interrupts
Signed-off-bu: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'arch/blackfin/mach-bf548/Kconfig')
-rw-r--r--arch/blackfin/mach-bf548/Kconfig34
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf548/Kconfig b/arch/blackfin/mach-bf548/Kconfig
index b28625e921be..e78b03d56c7c 100644
--- a/arch/blackfin/mach-bf548/Kconfig
+++ b/arch/blackfin/mach-bf548/Kconfig
@@ -277,6 +277,40 @@ config IRQ_PINT3
endmenu
+comment "Pin Interrupt to Port Assignment"
+menu "Assignment"
+
+config PINTx_REASSIGN
+ bool "Reprogram PINT Assignment"
+ default n
+ help
+ The interrupt assignment registers controls the pin-to-interrupt
+ assignment in a byte-wide manner. Each option allows you to select
+ a set of pins (High/Low Byte) of an specific Port being mapped
+ to one of the four PIN Interrupts IRQ_PINTx.
+
+ You shouldn't change any of these unless you know exactly what you're doing.
+ Please consult the Blackfin BF54x Processor Hardware Reference Manual.
+
+config PINT0_ASSIGN
+ hex "PINT0_ASSIGN"
+ depends on PINTx_REASSIGN
+ default 0x00000101
+config PINT1_ASSIGN
+ hex "PINT1_ASSIGN"
+ depends on PINTx_REASSIGN
+ default 0x01010000
+config PINT2_ASSIGN
+ hex "PINT2_ASSIGN"
+ depends on PINTx_REASSIGN
+ default 0x00000101
+config PINT3_ASSIGN
+ hex "PINT3_ASSIGN"
+ depends on PINTx_REASSIGN
+ default 0x02020303
+
+endmenu
+
endmenu
endif