arch: remove blackfin port

The Analog Devices Blackfin port was added in 2007 and was rather
active for a while, but all work on it has come to a standstill
over time, as Analog have changed their product line-up.

Aaron Wu confirmed that the architecture port is no longer relevant,
and multiple people suggested removing blackfin independently because
of some of its oddities like a non-working SMP port, and the amount of
duplication between the chip variants, which cause extra work when
doing cross-architecture changes.

Link: https://docs.blackfin.uclinux.org/
Acked-by: Aaron Wu <Aaron.Wu@analog.com>
Acked-by: Bryan Wu <cooloney@gmail.com>
Cc: Steven Miao <realmz6@gmail.com>
Cc: Mike Frysinger <vapier@chromium.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

1 files changed, 0 insertions, 40 deletions

diff --git a/arch/blackfin/mach-bf561/hotplug.c b/arch/blackfin/mach-bf561/hotplug.c
deleted file mode 100644
index 0123117b8ff2..000000000000
--- a/arch/blackfin/mach-bf561/hotplug.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Copyright 2007-2009 Analog Devices Inc.
- *               Graff Yang <graf.yang@analog.com>
- *
- * Licensed under the GPL-2 or later.
- */
-
-#include <linux/smp.h>
-#include <asm/blackfin.h>
-#include <asm/cacheflush.h>
-#include <mach/pll.h>
-
-int hotplug_coreb;
-
-void platform_cpu_die(void)
-{
-	unsigned long iwr;
-
-	hotplug_coreb = 1;
-
-	/*
-	 * When CoreB wakes up, the code in _coreb_trampoline_start cannot
-	 * turn off the data cache. This causes the CoreB failed to boot.
-	 * As a workaround, we invalidate all the data cache before sleep.
-	 */
-	blackfin_invalidate_entire_dcache();
-
-	/* disable core timer */
-	bfin_write_TCNTL(0);
-
-	/* clear ipi interrupt IRQ_SUPPLE_0 of CoreB */
-	bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (10 + 1)));
-	SSYNC();
-
-	/* set CoreB wakeup by ipi0, iwr will be discarded */
-	bfin_iwr_set_sup0(&iwr, &iwr, &iwr);
-	SSYNC();
-
-	coreb_die();
-}