diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2009-03-13 22:44:51 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-03-13 22:44:51 +0100 |
commit | 97fb44eb6bc01f4ffed4300e475aa15e44877375 (patch) | |
tree | 481ed6efd0babe7185cae04f2fd295426b36411d /arch/blackfin/mach-bf561/include/mach/anomaly.h | |
parent | [ARM] 5422/1: ARM: MMU: add a Non-cacheable Normal executable memory type (diff) | |
parent | qong: basic support for Dave/DENX QongEVB-LITE board (diff) | |
download | linux-97fb44eb6bc01f4ffed4300e475aa15e44877375.tar.xz linux-97fb44eb6bc01f4ffed4300e475aa15e44877375.zip |
Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6 into devel
Conflicts:
arch/arm/mach-at91/gpio.c
Diffstat (limited to 'arch/blackfin/mach-bf561/include/mach/anomaly.h')
-rw-r--r-- | arch/blackfin/mach-bf561/include/mach/anomaly.h | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/blackfin/mach-bf561/include/mach/anomaly.h b/arch/blackfin/mach-bf561/include/mach/anomaly.h index 1a9e17562821..d0b0b3506440 100644 --- a/arch/blackfin/mach-bf561/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf561/include/mach/anomaly.h @@ -2,7 +2,7 @@ * File: include/asm-blackfin/mach-bf561/anomaly.h * Bugs: Enter bugs at http://blackfin.uclinux.org/ * - * Copyright (C) 2004-2008 Analog Devices Inc. + * Copyright (C) 2004-2009 Analog Devices Inc. * Licensed under the GPL-2 or later. */ @@ -224,7 +224,7 @@ #define ANOMALY_05000301 (1) /* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */ #define ANOMALY_05000302 (1) -/* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */ +/* SPORT_HYS Bit in PLL_CTL Register Is Not Functional */ #define ANOMALY_05000305 (__SILICON_REVISION__ < 5) /* SCKELOW Bit Does Not Maintain State Through Hibernate */ #define ANOMALY_05000307 (__SILICON_REVISION__ < 5) @@ -283,8 +283,11 @@ #define ANOMALY_05000273 (0) #define ANOMALY_05000311 (0) #define ANOMALY_05000353 (1) +#define ANOMALY_05000380 (0) #define ANOMALY_05000386 (1) #define ANOMALY_05000432 (0) #define ANOMALY_05000435 (0) +#define ANOMALY_05000447 (0) +#define ANOMALY_05000448 (0) #endif |