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| author | Mike Frysinger <vapier.adi@gmail.com> | 2008-11-18 10:48:22 +0100 |
|---|---|---|
| committer | Bryan Wu <cooloney@kernel.org> | 2008-11-18 10:48:22 +0100 |
| commit | 3c1fbd5184f9c3c52c0a392fae0efb0b0d99a079 (patch) | |
| tree | 1b94bd6487234e7cbfc0b09bf6221e25e02e0a12 /arch/blackfin/mach-common/cache.S | |
| parent | Blackfin arch: make ADI board names consistent (diff) | |
| download | linux-3c1fbd5184f9c3c52c0a392fae0efb0b0d99a079.tar.xz linux-3c1fbd5184f9c3c52c0a392fae0efb0b0d99a079.zip | |
Blackfin arch: rewrite blackfin_invalidate_entire_dcache function
rewrite blackfin_invalidate_entire_dcache() in C for easier management,
better optimization, and so we take all SSYNC anomalies into account
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-common/cache.S')
| -rw-r--r-- | arch/blackfin/mach-common/cache.S | 36 |
1 files changed, 0 insertions, 36 deletions
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S index 118751287437..3c98dacbf289 100644 --- a/arch/blackfin/mach-common/cache.S +++ b/arch/blackfin/mach-common/cache.S @@ -97,39 +97,3 @@ ENTRY(_blackfin_dflush_page) P1 = 1 << (PAGE_SHIFT - L1_CACHE_SHIFT); jump .Ldfr; ENDPROC(_blackfin_dflush_page) - -/* Invalidate the Entire Data cache by - * clearing DMC[1:0] bits - */ -ENTRY(_blackfin_invalidate_entire_dcache) - [--SP] = ( R7:5); - - P0.L = LO(DMEM_CONTROL); - P0.H = HI(DMEM_CONTROL); - R7 = [P0]; - R5 = R7; /* Save DMEM_CNTR */ - - /* Clear the DMC[1:0] bits, All valid bits in the data - * cache are set to the invalid state - */ - BITCLR(R7,DMC0_P); - BITCLR(R7,DMC1_P); - CLI R6; - SSYNC; /* SSYNC required before writing to DMEM_CONTROL. */ - .align 8; - [P0] = R7; - SSYNC; - STI R6; - - /* Configures the data cache again */ - - CLI R6; - SSYNC; /* SSYNC required before writing to DMEM_CONTROL. */ - .align 8; - [P0] = R5; - SSYNC; - STI R6; - - ( R7:5) = [SP++]; - RTS; -ENDPROC(_blackfin_invalidate_entire_dcache) |