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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2008-02-29 17:41:13 +0100
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2008-02-29 17:41:13 +0100
commit84b9a774008b132a8b5bd5460f639028a9c7f971 (patch)
tree4d6bd0f095c5653672cd227053da1579a8859b23 /arch/blackfin/mach-common/dpmc.S
parentMerge branch 'for-linus' of git://oss.sgi.com:8090/xfs/xfs-2.6 (diff)
parentBlackfin Serial Driver: Fix bug - Only insert UART rx char in timer task. (diff)
downloadlinux-84b9a774008b132a8b5bd5460f639028a9c7f971.tar.xz
linux-84b9a774008b132a8b5bd5460f639028a9c7f971.zip
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (35 commits) Blackfin Serial Driver: Fix bug - Only insert UART rx char in timer task. Blackfin Serial Driver: Fix bug - update tx dma buffer tail before wake up processes. Blackfin Serial Driver: Fix bug - Increase buffer tail immediately before starting tx dma. [Blackfin] serial driver: Add flow control support to bf54x [Blackfin] serial driver: Fix bug Poll RTS/CTS status in DMA mode as well [Blackfin] serial driver: ADSP-BF52x arch/mach support [Blackfin] serial driver: use simpler comment headers and strip out information that is maintained in the scm's log [Blackfin] serial driver: rework break flood anomaly handling to be more robust/realistic about what we can actually work around [Blackfin] serial driver: fix bug - cache the bits of the LSR on systems where the LSR is read-to-clear [Blackfin] serial driver: fix bug - should not wait for the TFI bit, just clear it when tx stop. [Blackfin] serial driver: Fix bug serial driver in DMA mode spams history to console on shell restart [Blackfin] serial driver: Fix bug Free rx dma buffer in shutdown. [Blackfin] serial driver: Clean up UART DMA code. Blackfin Serial driver: Fix bug - serial driver in PIO mode cant handle input very quickly [Blackfin] arch: kill section mismatch warnings [Blackfin] arch: handle the most common L1 shrinkage case (L1 does not exist for a part) so that any parts labeled for L1 instead get placed into external memory sections [Blackfin] arch: add bfin_clear_PPIx_STATUS() helper funcs like we have for other parts [Blackfin] arch: make sure we have proper description/copyright/license lines [Blackfin] arch: Fix CONFIG_PM support for BF561 [Blackfin] arch: Remove DPMC char driver option ...
Diffstat (limited to 'arch/blackfin/mach-common/dpmc.S')
-rw-r--r--arch/blackfin/mach-common/dpmc.S137
1 files changed, 2 insertions, 135 deletions
diff --git a/arch/blackfin/mach-common/dpmc.S b/arch/blackfin/mach-common/dpmc.S
index b80ddd8b232d..9d45aa3265b1 100644
--- a/arch/blackfin/mach-common/dpmc.S
+++ b/arch/blackfin/mach-common/dpmc.S
@@ -31,140 +31,6 @@
#include <asm/blackfin.h>
#include <asm/mach/irq.h>
-.text
-
-ENTRY(_unmask_wdog_wakeup_evt)
- [--SP] = ( R7:0, P5:0 );
-#if defined(CONFIG_BF561)
- P0.H = hi(SICA_IWR1);
- P0.L = lo(SICA_IWR1);
-#elif defined(CONFIG_BF54x) || defined(CONFIG_BF52x)
- P0.h = HI(SIC_IWR0);
- P0.l = LO(SIC_IWR0);
-#else
- P0.h = HI(SIC_IWR);
- P0.l = LO(SIC_IWR);
-#endif
- R7 = [P0];
-#if defined(CONFIG_BF561)
- BITSET(R7, 27);
-#else
- BITSET(R7,(IRQ_WATCH - IVG7));
-#endif
- [P0] = R7;
- SSYNC;
-
- ( R7:0, P5:0 ) = [SP++];
- RTS;
-
-.LWRITE_TO_STAT:
- /* When watch dog timer is enabled, a write to STAT will load the
- * contents of CNT to STAT
- */
- R7 = 0x0000(z);
-#if defined(CONFIG_BF561)
- P0.h = HI(WDOGA_STAT);
- P0.l = LO(WDOGA_STAT);
-#else
- P0.h = HI(WDOG_STAT);
- P0.l = LO(WDOG_STAT);
-#endif
- [P0] = R7;
- SSYNC;
- JUMP .LSKIP_WRITE_TO_STAT;
-
-ENTRY(_program_wdog_timer)
- [--SP] = ( R7:0, P5:0 );
-#if defined(CONFIG_BF561)
- P0.h = HI(WDOGA_CNT);
- P0.l = LO(WDOGA_CNT);
-#else
- P0.h = HI(WDOG_CNT);
- P0.l = LO(WDOG_CNT);
-#endif
- [P0] = R0;
- SSYNC;
-
-#if defined(CONFIG_BF561)
- P0.h = HI(WDOGA_CTL);
- P0.l = LO(WDOGA_CTL);
-#else
- P0.h = HI(WDOG_CTL);
- P0.l = LO(WDOG_CTL);
-#endif
- R7 = W[P0](Z);
- CC = BITTST(R7,1);
- if !CC JUMP .LWRITE_TO_STAT;
- CC = BITTST(R7,2);
- if !CC JUMP .LWRITE_TO_STAT;
-
-.LSKIP_WRITE_TO_STAT:
-#if defined(CONFIG_BF561)
- P0.h = HI(WDOGA_CTL);
- P0.l = LO(WDOGA_CTL);
-#else
- P0.h = HI(WDOG_CTL);
- P0.l = LO(WDOG_CTL);
-#endif
- R7 = W[P0](Z);
- BITCLR(R7,1); /* Enable GP event */
- BITSET(R7,2);
- W[P0] = R7.L;
- SSYNC;
- NOP;
-
- R7 = W[P0](Z);
- BITCLR(R7,4); /* Enable the wdog counter */
- W[P0] = R7.L;
- SSYNC;
-
- ( R7:0, P5:0 ) = [SP++];
- RTS;
-
-ENTRY(_clear_wdog_wakeup_evt)
- [--SP] = ( R7:0, P5:0 );
-
-#if defined(CONFIG_BF561)
- P0.h = HI(WDOGA_CTL);
- P0.l = LO(WDOGA_CTL);
-#else
- P0.h = HI(WDOG_CTL);
- P0.l = LO(WDOG_CTL);
-#endif
- R7 = 0x0AD6(Z);
- W[P0] = R7.L;
- SSYNC;
-
- R7 = W[P0](Z);
- BITSET(R7,15);
- W[P0] = R7.L;
- SSYNC;
-
- R7 = W[P0](Z);
- BITSET(R7,1);
- BITSET(R7,2);
- W[P0] = R7.L;
- SSYNC;
-
- ( R7:0, P5:0 ) = [SP++];
- RTS;
-
-ENTRY(_disable_wdog_timer)
- [--SP] = ( R7:0, P5:0 );
-#if defined(CONFIG_BF561)
- P0.h = HI(WDOGA_CTL);
- P0.l = LO(WDOGA_CTL);
-#else
- P0.h = HI(WDOG_CTL);
- P0.l = LO(WDOG_CTL);
-#endif
- R7 = 0xAD6(Z);
- W[P0] = R7.L;
- SSYNC;
- ( R7:0, P5:0 ) = [SP++];
- RTS;
-
-#if !defined(CONFIG_BF561)
.section .l1.text
@@ -459,10 +325,12 @@ ENTRY(_set_sic_iwr)
RTS;
ENTRY(_set_rtc_istat)
+#ifndef CONFIG_BF561
P0.H = hi(RTC_ISTAT);
P0.L = lo(RTC_ISTAT);
w[P0] = R0.L;
SSYNC;
+#endif
RTS;
ENTRY(_test_pll_locked)
@@ -473,4 +341,3 @@ ENTRY(_test_pll_locked)
CC = BITTST(R0,5);
IF !CC JUMP 1b;
RTS;
-#endif