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authorMichael Hennerich <michael.hennerich@analog.com>2008-08-25 11:39:11 +0200
committerBryan Wu <cooloney@kernel.org>2008-08-25 11:39:11 +0200
commitceac2651e9b7b77734d1c2b6f5d7d218d22f5427 (patch)
treeef66c46115793d54f44c7676a1e9c300cf307842 /arch/blackfin
parentMerge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6 (diff)
downloadlinux-ceac2651e9b7b77734d1c2b6f5d7d218d22f5427.tar.xz
linux-ceac2651e9b7b77734d1c2b6f5d7d218d22f5427.zip
Blackfin arch: Add MTD Partitions for MTD_DATAFLASH, increase max SPI SCLK
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin')
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c27
1 files changed, 26 insertions, 1 deletions
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index e93964fdb432..8482d22321f3 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -584,6 +584,30 @@ static struct bfin5xx_spi_chip spidev_chip_info = {
#if defined(CONFIG_MTD_DATAFLASH) \
|| defined(CONFIG_MTD_DATAFLASH_MODULE)
+
+static struct mtd_partition bfin_spi_dataflash_partitions[] = {
+ {
+ .name = "bootloader(spi)",
+ .size = 0x00040000,
+ .offset = 0,
+ .mask_flags = MTD_CAP_ROM
+ }, {
+ .name = "linux kernel(spi)",
+ .size = 0xe0000,
+ .offset = MTDPART_OFS_APPEND,
+ }, {
+ .name = "file system(spi)",
+ .size = MTDPART_SIZ_FULL,
+ .offset = MTDPART_OFS_APPEND,
+ }
+};
+
+static struct flash_platform_data bfin_spi_dataflash_data = {
+ .name = "SPI Dataflash",
+ .parts = bfin_spi_dataflash_partitions,
+ .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
+};
+
/* DataFlash chip */
static struct bfin5xx_spi_chip data_flash_chip_info = {
.enable_dma = 0, /* use dma transfer with this chip*/
@@ -609,9 +633,10 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
|| defined(CONFIG_MTD_DATAFLASH_MODULE)
{ /* DataFlash chip */
.modalias = "mtd_dataflash",
- .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
+ .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0, /* Framework bus number */
.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
+ .platform_data = &bfin_spi_dataflash_data,
.controller_data = &data_flash_chip_info,
.mode = SPI_MODE_3,
},