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authorLorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>2014-05-29 19:16:54 +0200
committerWill Deacon <will.deacon@arm.com>2014-05-30 18:48:13 +0200
commit9358d755bd5cba8965ea79f2a446e689323409f9 (patch)
tree4e587ee50563768cf5196144d481fcaf395f5419 /arch/blackfin
parentarm64: ftrace: Add system call tracepoint (diff)
downloadlinux-9358d755bd5cba8965ea79f2a446e689323409f9.tar.xz
linux-9358d755bd5cba8965ea79f2a446e689323409f9.zip
arm64: kernel: initialize broadcast hrtimer based clock event device
On platforms implementing CPU power management, the CPUidle subsystem can allow CPUs to enter idle states where local timers logic is lost on power down. To keep the software timers functional the kernel relies on an always-on broadcast timer to be present in the platform to relay the interrupt signalling the timer expiries. For platforms implementing CPU core gating that do not implement an always-on HW timer or implement it in a broken way, this patch adds code to initialize the kernel hrtimer based clock event device upon boot (which can be chosen as tick broadcast device by the kernel). It relies on a dynamically chosen CPU to be always powered-up. This CPU then relays the timer interrupt to CPUs in deep-idle states through its HW local timer device. Having a CPU always-on has implications on power management platform capabilities and makes CPUidle suboptimal, since at least a CPU is kept always in a shallow idle state by the kernel to relay timer interrupts, but at least leaves the kernel with a functional system with some working power management capabilities. The hrtimer based clock event device is unconditionally registered, but has the lowest possible rating such that any broadcast-capable HW clock event device present will be chosen in preference as the tick broadcast device. Reviewed-by: Preeti U Murthy <preeti@linux.vnet.ibm.com> Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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