summaryrefslogtreecommitdiffstats
path: root/arch/blackfin
diff options
context:
space:
mode:
authorBarry Song <barry.song@analog.com>2009-11-17 10:45:59 +0100
committerMike Frysinger <vapier@gentoo.org>2010-10-22 09:48:43 +0200
commitf9f0e3b1f7ac4e9fa822e87dd4bbb38f8c389487 (patch)
treeb0cad35d302e32bae4657909566d82bcb6eb1d7a /arch/blackfin
parentBlackfin: punt short SPI MMR bit names (diff)
downloadlinux-f9f0e3b1f7ac4e9fa822e87dd4bbb38f8c389487.tar.xz
linux-f9f0e3b1f7ac4e9fa822e87dd4bbb38f8c389487.zip
Blackfin: bf537-stamp: update GPIO CS devices
Now that we've rewritten the GPIO CS handling in the Blackfin SPI peripheral, we need to update the platform resources accordingly. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin')
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index 68a27bccc7d4..a3f172fdda99 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -824,14 +824,12 @@ static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
.enable_dma = 1,
.bits_per_word = 8,
- .cs_gpio = GPIO_PF10,
};
#endif
#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
static struct bfin5xx_spi_chip adf7021_spi_chip_info = {
.bits_per_word = 16,
- .cs_gpio = GPIO_PF10,
};
#include <linux/spi/adf702x.h>
@@ -1103,7 +1101,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
.irq = IRQ_PF6,
.bus_num = 0,
- .chip_select = 0, /* GPIO controlled SSEL */
+ .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
.controller_data = &enc28j60_spi_chip_info,
.mode = SPI_MODE_0,
},
@@ -1125,7 +1123,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
.modalias = "adf702x",
.max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
- .chip_select = 0, /* GPIO controlled SSEL */
+ .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
.controller_data = &adf7021_spi_chip_info,
.platform_data = &adf7021_platform_data,
.mode = SPI_MODE_0,
@@ -1148,7 +1146,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
- .num_chipselect = 8,
+ .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
.enable_dma = 1, /* master has the ability to do dma transfer */
.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};