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authorJesper Nilsson <jesper@jni.nu>2018-03-11 11:05:23 +0100
committerArnd Bergmann <arnd@arndb.de>2018-03-16 10:56:05 +0100
commitc690eddc2f3b44b24520f4a77cc3a4c9bde7d571 (patch)
treeb7ba2caa6ebb2e36a529f9bf7182c9e0a73d53c4 /arch/cris/arch-v32/mach-fs/hw_settings.S
parentarch: remove tile port (diff)
downloadlinux-c690eddc2f3b44b24520f4a77cc3a4c9bde7d571.tar.xz
linux-c690eddc2f3b44b24520f4a77cc3a4c9bde7d571.zip
CRIS: Drop support for the CRIS port
The port was added back in 2000 so it's no longer even a good source of inspiration for newer ports (if it ever was) The last SoC (ARTPEC-3) with a CRIS main CPU was launched in 2008. Coupled with time and working developer board hardware being in low supply, it's time to drop the port from Linux. So long and thanks for all the fish! Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/cris/arch-v32/mach-fs/hw_settings.S')
-rw-r--r--arch/cris/arch-v32/mach-fs/hw_settings.S71
1 files changed, 0 insertions, 71 deletions
diff --git a/arch/cris/arch-v32/mach-fs/hw_settings.S b/arch/cris/arch-v32/mach-fs/hw_settings.S
deleted file mode 100644
index 7fbadcc48c0c..000000000000
--- a/arch/cris/arch-v32/mach-fs/hw_settings.S
+++ /dev/null
@@ -1,71 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * This table is used by some tools to extract hardware parameters.
- * The table should be included in the kernel and the decompressor.
- * Don't forget to update the tools if you change this table.
- *
- * Copyright (C) 2001-2007 Axis Communications AB
- *
- * Authors: Mikael Starvik <starvik@axis.com>
- */
-
-#include <hwregs/asm/reg_map_asm.h>
-#include <hwregs/asm/bif_core_defs_asm.h>
-#include <hwregs/asm/gio_defs_asm.h>
-
- .ascii "HW_PARAM_MAGIC" ; Magic number
- .dword 0xc0004000 ; Kernel start address
-
- ; Debug port
-#ifdef CONFIG_ETRAX_DEBUG_PORT0
- .dword 0
-#elif defined(CONFIG_ETRAX_DEBUG_PORT1)
- .dword 1
-#elif defined(CONFIG_ETRAX_DEBUG_PORT2)
- .dword 2
-#elif defined(CONFIG_ETRAX_DEBUG_PORT3)
- .dword 3
-#else
- .dword 4 ; No debug
-#endif
-
- ; Register values
- .dword REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg)
- .dword CONFIG_ETRAX_MEM_GRP1_CONFIG
- .dword REG_ADDR(bif_core, regi_bif_core, rw_grp2_cfg)
- .dword CONFIG_ETRAX_MEM_GRP2_CONFIG
- .dword REG_ADDR(bif_core, regi_bif_core, rw_grp3_cfg)
- .dword CONFIG_ETRAX_MEM_GRP3_CONFIG
- .dword REG_ADDR(bif_core, regi_bif_core, rw_grp4_cfg)
- .dword CONFIG_ETRAX_MEM_GRP4_CONFIG
- .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp0)
- .dword CONFIG_ETRAX_SDRAM_GRP0_CONFIG
- .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp1)
- .dword CONFIG_ETRAX_SDRAM_GRP1_CONFIG
- .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing)
- .dword CONFIG_ETRAX_SDRAM_TIMING
- .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cmd)
- .dword CONFIG_ETRAX_SDRAM_COMMAND
-
- .dword REG_ADDR(gio, regi_gio, rw_pa_dout)
- .dword CONFIG_ETRAX_DEF_GIO_PA_OUT
- .dword REG_ADDR(gio, regi_gio, rw_pa_oe)
- .dword CONFIG_ETRAX_DEF_GIO_PA_OE
- .dword REG_ADDR(gio, regi_gio, rw_pb_dout)
- .dword CONFIG_ETRAX_DEF_GIO_PB_OUT
- .dword REG_ADDR(gio, regi_gio, rw_pb_oe)
- .dword CONFIG_ETRAX_DEF_GIO_PB_OE
- .dword REG_ADDR(gio, regi_gio, rw_pc_dout)
- .dword CONFIG_ETRAX_DEF_GIO_PC_OUT
- .dword REG_ADDR(gio, regi_gio, rw_pc_oe)
- .dword CONFIG_ETRAX_DEF_GIO_PC_OE
- .dword REG_ADDR(gio, regi_gio, rw_pd_dout)
- .dword CONFIG_ETRAX_DEF_GIO_PD_OUT
- .dword REG_ADDR(gio, regi_gio, rw_pd_oe)
- .dword CONFIG_ETRAX_DEF_GIO_PD_OE
- .dword REG_ADDR(gio, regi_gio, rw_pe_dout)
- .dword CONFIG_ETRAX_DEF_GIO_PE_OUT
- .dword REG_ADDR(gio, regi_gio, rw_pe_oe)
- .dword CONFIG_ETRAX_DEF_GIO_PE_OE
-
- .dword 0 ; No more register values