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author | David Fries <david@fries.net> | 2008-08-18 06:03:40 +0200 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-08-18 08:50:19 +0200 |
commit | e532c06f2a835b5cc4f4166f467437d9b09c1d0e (patch) | |
tree | 762fa0f0c22dc1af7d9d6e918f4d48ced8910a4e /arch/frv | |
parent | x86: mpparse.c: fix section mismatch warning (diff) | |
download | linux-e532c06f2a835b5cc4f4166f467437d9b09c1d0e.tar.xz linux-e532c06f2a835b5cc4f4166f467437d9b09c1d0e.zip |
x86: fix i486 suspend to disk CR4 oops
arch/x86/power/cpu_32.c __save_processor_state calls read_cr4()
only a i486 CPU doesn't have the CR4 register. Trying to read it
produces an invalid opcode oops during suspend to disk.
Use the safe rc4 reading op instead. If the value to be written is
zero the write is skipped.
arch/x86/power/hibernate_asm_32.S
done: swapped the use of %eax and %ecx to use jecxz for
the zero test and jump over store to %cr4.
restore_image: s/%ecx/%eax/ to be consistent with done:
In addition to __save_processor_state, acpi_save_state_mem,
efi_call_phys_prelog, and efi_call_phys_epilog had checks added
(acpi restore was in assembly and already had a check for
non-zero). There were other reads and writes of CR4, but MCE and
virtualization shouldn't be executed on a i486 anyway.
Signed-off-by: David Fries <david@fries.net>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/frv')
0 files changed, 0 insertions, 0 deletions