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author | Andi Kleen <ak@suse.de> | 2007-04-24 13:05:37 +0200 |
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committer | Andi Kleen <andi@basil.nowhere.org> | 2007-04-24 13:05:37 +0200 |
commit | 8689b517be3e3f65f8ba20490beccca13c5879fa (patch) | |
tree | 4b70c8163dfd52c9ec4297cbd04aed9b96daaa86 /arch/i386 | |
parent | [PATCH] x86-64: Always flush all pages in change_page_attr (diff) | |
download | linux-8689b517be3e3f65f8ba20490beccca13c5879fa.tar.xz linux-8689b517be3e3f65f8ba20490beccca13c5879fa.zip |
[PATCH] i386: Fix some warnings added by earlier patch
Signed-off-by: Andi Kleen <ak@suse.de>
Diffstat (limited to 'arch/i386')
-rw-r--r-- | arch/i386/kernel/nmi.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/i386/kernel/nmi.c b/arch/i386/kernel/nmi.c index 9f1e8c1afab7..84c3497efb60 100644 --- a/arch/i386/kernel/nmi.c +++ b/arch/i386/kernel/nmi.c @@ -126,7 +126,7 @@ int avail_to_resrv_perfctr_nmi_bit(unsigned int counter) int cpu; BUG_ON(counter > NMI_MAX_COUNTER_BITS); for_each_possible_cpu (cpu) { - if (test_bit(counter, &per_cpu(perfctr_nmi_owner, cpu))) + if (test_bit(counter, &per_cpu(perfctr_nmi_owner, cpu)[0])) return 0; } return 1; @@ -142,7 +142,7 @@ int avail_to_resrv_perfctr_nmi(unsigned int msr) BUG_ON(counter > NMI_MAX_COUNTER_BITS); for_each_possible_cpu (cpu) { - if (test_bit(counter, &per_cpu(perfctr_nmi_owner, cpu))) + if (test_bit(counter, &per_cpu(perfctr_nmi_owner, cpu)[0])) return 0; } return 1; @@ -157,7 +157,7 @@ static int __reserve_perfctr_nmi(int cpu, unsigned int msr) counter = nmi_perfctr_msr_to_bit(msr); BUG_ON(counter > NMI_MAX_COUNTER_BITS); - if (!test_and_set_bit(counter, &per_cpu(perfctr_nmi_owner, cpu))) + if (!test_and_set_bit(counter, &per_cpu(perfctr_nmi_owner, cpu)[0])) return 1; return 0; } @@ -171,7 +171,7 @@ static void __release_perfctr_nmi(int cpu, unsigned int msr) counter = nmi_perfctr_msr_to_bit(msr); BUG_ON(counter > NMI_MAX_COUNTER_BITS); - clear_bit(counter, &per_cpu(perfctr_nmi_owner, cpu)); + clear_bit(counter, &per_cpu(perfctr_nmi_owner, cpu)[0]); } int reserve_perfctr_nmi(unsigned int msr) |