arch: Remove Itanium (IA-64) architecture

The Itanium architecture is obsolete, and an informal survey [0] reveals
that any residual use of Itanium hardware in production is mostly HP-UX
or OpenVMS based. The use of Linux on Itanium appears to be limited to
enthusiasts that occasionally boot a fresh Linux kernel to see whether
things are still working as intended, and perhaps to churn out some
distro packages that are rarely used in practice.

None of the original companies behind Itanium still produce or support
any hardware or software for the architecture, and it is listed as
'Orphaned' in the MAINTAINERS file, as apparently, none of the engineers
that contributed on behalf of those companies (nor anyone else, for that
matter) have been willing to support or maintain the architecture
upstream or even be responsible for applying the odd fix. The Intel
firmware team removed all IA-64 support from the Tianocore/EDK2
reference implementation of EFI in 2018. (Itanium is the original
architecture for which EFI was developed, and the way Linux supports it
deviates significantly from other architectures.) Some distros, such as
Debian and Gentoo, still maintain [unofficial] ia64 ports, but many have
dropped support years ago.

While the argument is being made [1] that there is a 'for the common
good' angle to being able to build and run existing projects such as the
Grid Community Toolkit [2] on Itanium for interoperability testing, the
fact remains that none of those projects are known to be deployed on
Linux/ia64, and very few people actually have access to such a system in
the first place. Even if there were ways imaginable in which Linux/ia64
could be put to good use today, what matters is whether anyone is
actually doing that, and this does not appear to be the case.

There are no emulators widely available, and so boot testing Itanium is
generally infeasible for ordinary contributors. GCC still supports IA-64
but its compile farm [3] no longer has any IA-64 machines. GLIBC would
like to get rid of IA-64 [4] too because it would permit some overdue
code cleanups. In summary, the benefits to the ecosystem of having IA-64
be part of it are mostly theoretical, whereas the maintenance overhead
of keeping it supported is real.

So let's rip off the band aid, and remove the IA-64 arch code entirely.
This follows the timeline proposed by the Debian/ia64 maintainer [5],
which removes support in a controlled manner, leaving IA-64 in a known
good state in the most recent LTS release. Other projects will follow
once the kernel support is removed.

[0] https://lore.kernel.org/all/CAMj1kXFCMh_578jniKpUtx_j8ByHnt=s7S+yQ+vGbKt9ud7+kQ@mail.gmail.com/
[1] https://lore.kernel.org/all/0075883c-7c51-00f5-2c2d-5119c1820410@web.de/
[2] https://gridcf.org/gct-docs/latest/index.html
[3] https://cfarm.tetaneutral.net/machines/list/
[4] https://lore.kernel.org/all/87bkiilpc4.fsf@mid.deneb.enyo.de/
[5] https://lore.kernel.org/all/ff58a3e76e5102c94bb5946d99187b358def688a.camel@physik.fu-berlin.de/

Acked-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>

1 files changed, 0 insertions, 217 deletions

diff --git a/arch/ia64/kernel/brl_emu.c b/arch/ia64/kernel/brl_emu.c
deleted file mode 100644
index 782c481d7052..000000000000
--- a/arch/ia64/kernel/brl_emu.c
+++ /dev/null
@@ -1,217 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- *  Emulation of the "brl" instruction for IA64 processors that
- *  don't support it in hardware.
- *  Author: Stephan Zeisset, Intel Corp. <Stephan.Zeisset@intel.com>
- *
- *    02/22/02	D. Mosberger	Clear si_flgs, si_isr, and si_imm to avoid
- *				leaking kernel bits.
- */
-
-#include <linux/kernel.h>
-#include <linux/sched/signal.h>
-#include <linux/uaccess.h>
-#include <asm/processor.h>
-
-extern char ia64_set_b1, ia64_set_b2, ia64_set_b3, ia64_set_b4, ia64_set_b5;
-
-struct illegal_op_return {
-	unsigned long fkt, arg1, arg2, arg3;
-};
-
-/*
- *  The unimplemented bits of a virtual address must be set
- *  to the value of the most significant implemented bit.
- *  unimpl_va_mask includes all unimplemented bits and
- *  the most significant implemented bit, so the result
- *  of an and operation with the mask must be all 0's
- *  or all 1's for the address to be valid.
- */
-#define unimplemented_virtual_address(va) (						\
-	((va) & local_cpu_data->unimpl_va_mask) != 0 &&					\
-	((va) & local_cpu_data->unimpl_va_mask) != local_cpu_data->unimpl_va_mask	\
-)
-
-/*
- *  The unimplemented bits of a physical address must be 0.
- *  unimpl_pa_mask includes all unimplemented bits, so the result
- *  of an and operation with the mask must be all 0's for the
- *  address to be valid.
- */
-#define unimplemented_physical_address(pa) (		\
-	((pa) & local_cpu_data->unimpl_pa_mask) != 0	\
-)
-
-/*
- *  Handle an illegal operation fault that was caused by an
- *  unimplemented "brl" instruction.
- *  If we are not successful (e.g because the illegal operation
- *  wasn't caused by a "brl" after all), we return -1.
- *  If we are successful, we return either 0 or the address
- *  of a "fixup" function for manipulating preserved register
- *  state.
- */
-
-struct illegal_op_return
-ia64_emulate_brl (struct pt_regs *regs, unsigned long ar_ec)
-{
-	unsigned long bundle[2];
-	unsigned long opcode, btype, qp, offset, cpl;
-	unsigned long next_ip;
-	struct illegal_op_return rv;
-	long tmp_taken, unimplemented_address;
-
-	rv.fkt = (unsigned long) -1;
-
-	/*
-	 *  Decode the instruction bundle.
-	 */
-
-	if (copy_from_user(bundle, (void *) (regs->cr_iip), sizeof(bundle)))
-		return rv;
-
-	next_ip = (unsigned long) regs->cr_iip + 16;
-
-	/* "brl" must be in slot 2. */
-	if (ia64_psr(regs)->ri != 1) return rv;
-
-	/* Must be "mlx" template */
-	if ((bundle[0] & 0x1e) != 0x4) return rv;
-
-	opcode = (bundle[1] >> 60);
-	btype = ((bundle[1] >> 29) & 0x7);
-	qp = ((bundle[1] >> 23) & 0x3f);
-	offset = ((bundle[1] & 0x0800000000000000L) << 4)
-		| ((bundle[1] & 0x00fffff000000000L) >> 32)
-		| ((bundle[1] & 0x00000000007fffffL) << 40)
-		| ((bundle[0] & 0xffff000000000000L) >> 24);
-
-	tmp_taken = regs->pr & (1L << qp);
-
-	switch(opcode) {
-
-		case 0xC:
-			/*
-			 *  Long Branch.
-			 */
-			if (btype != 0) return rv;
-			rv.fkt = 0;
-			if (!(tmp_taken)) {
-				/*
-				 *  Qualifying predicate is 0.
-				 *  Skip instruction.
-				 */
-				regs->cr_iip = next_ip;
-				ia64_psr(regs)->ri = 0;
-				return rv;
-			}
-			break;
-
-		case 0xD:
-			/*
-			 *  Long Call.
-			 */
-			rv.fkt = 0;
-			if (!(tmp_taken)) {
-				/*
-				 *  Qualifying predicate is 0.
-				 *  Skip instruction.
-				 */
-				regs->cr_iip = next_ip;
-				ia64_psr(regs)->ri = 0;
-				return rv;
-			}
-
-			/*
-			 *  BR[btype] = IP+16
-			 */
-			switch(btype) {
-				case 0:
-					regs->b0 = next_ip;
-					break;
-				case 1:
-					rv.fkt = (unsigned long) &ia64_set_b1;
-					break;
-				case 2:
-					rv.fkt = (unsigned long) &ia64_set_b2;
-					break;
-				case 3:
-					rv.fkt = (unsigned long) &ia64_set_b3;
-					break;
-				case 4:
-					rv.fkt = (unsigned long) &ia64_set_b4;
-					break;
-				case 5:
-					rv.fkt = (unsigned long) &ia64_set_b5;
-					break;
-				case 6:
-					regs->b6 = next_ip;
-					break;
-				case 7:
-					regs->b7 = next_ip;
-					break;
-			}
-			rv.arg1 = next_ip;
-
-			/*
-			 *  AR[PFS].pfm = CFM
-			 *  AR[PFS].pec = AR[EC]
-			 *  AR[PFS].ppl = PSR.cpl
-			 */
-			cpl = ia64_psr(regs)->cpl;
-			regs->ar_pfs = ((regs->cr_ifs & 0x3fffffffff)
-					| (ar_ec << 52) | (cpl << 62));
-
-			/*
-			 *  CFM.sof -= CFM.sol
-			 *  CFM.sol = 0
-			 *  CFM.sor = 0
-			 *  CFM.rrb.gr = 0
-			 *  CFM.rrb.fr = 0
-			 *  CFM.rrb.pr = 0
-			 */
-			regs->cr_ifs = ((regs->cr_ifs & 0xffffffc00000007f)
-					- ((regs->cr_ifs >> 7) & 0x7f));
-
-			break;
-
-		default:
-			/*
-			 *  Unknown opcode.
-			 */
-			return rv;
-
-	}
-
-	regs->cr_iip += offset;
-	ia64_psr(regs)->ri = 0;
-
-	if (ia64_psr(regs)->it == 0)
-		unimplemented_address = unimplemented_physical_address(regs->cr_iip);
-	else
-		unimplemented_address = unimplemented_virtual_address(regs->cr_iip);
-
-	if (unimplemented_address) {
-		/*
-		 *  The target address contains unimplemented bits.
-		 */
-		printk(KERN_DEBUG "Woah! Unimplemented Instruction Address Trap!\n");
-		force_sig_fault(SIGILL, ILL_BADIADDR, (void __user *)NULL,
-				0, 0, 0);
-	} else if (ia64_psr(regs)->tb) {
-		/*
-		 *  Branch Tracing is enabled.
-		 *  Force a taken branch signal.
-		 */
-		force_sig_fault(SIGTRAP, TRAP_BRANCH, (void __user *)NULL,
-				0, 0, 0);
-	} else if (ia64_psr(regs)->ss) {
-		/*
-		 *  Single Step is enabled.
-		 *  Force a trace signal.
-		 */
-		force_sig_fault(SIGTRAP, TRAP_TRACE, (void __user *)NULL,
-				0, 0, 0);
-	}
-	return rv;
-}