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authorGreg Ungerer <gerg@uclinux.org>2011-03-09 00:57:14 +0100
committerGreg Ungerer <gerg@uclinux.org>2011-03-15 12:01:54 +0100
commit58f0ac98f386d2b335e5852e8feec828c43a0e13 (patch)
treee5155ca33386026a9d0b7b2e0de00514f76fd295 /arch/m68k/include/asm/m5249sim.h
parentm68knommu: move ColdFire DMA register addresses to per-cpu headers (diff)
downloadlinux-58f0ac98f386d2b335e5852e8feec828c43a0e13.tar.xz
linux-58f0ac98f386d2b335e5852e8feec828c43a0e13.zip
m68knommu: remove use of MBAR in old-style ColdFire timer
Not all ColdFire CPUs that use the old style timer hardware module use an MBAR set peripheral region. Move the TIMER base address defines to the per-CPU header files where we can set it correctly based on how the peripherals are mapped - instead of using a fake MBAR for some platforms. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/m5249sim.h')
-rw-r--r--arch/m68k/include/asm/m5249sim.h8
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h
index aefb83ef8392..c318ce786f93 100644
--- a/arch/m68k/include/asm/m5249sim.h
+++ b/arch/m68k/include/asm/m5249sim.h
@@ -19,7 +19,7 @@
/*
* The 5249 has a second MBAR region, define its address.
*/
-#define MCF_MBAR2 0x80000000
+#define MCF_MBAR2 0x80000000
/*
* Define the 5249 SIM register set addresses.
@@ -67,6 +67,12 @@
#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */
/*
+ * Timer module.
+ */
+#define MCFTIMER_BASE1 (MCF_MBAR + 0x140) /* Base of TIMER1 */
+#define MCFTIMER_BASE2 (MCF_MBAR + 0x180) /* Base of TIMER2 */
+
+/*
* UART module.
*/
#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */