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authorGreg Ungerer <gerg@uclinux.org>2010-11-09 07:00:17 +0100
committerGreg Ungerer <gerg@uclinux.org>2011-01-05 06:19:20 +0100
commit4a5bae416562a8224707a1ff30e83ddab1474fb3 (patch)
treee827800effdcb4d96a5042aa5540fd5553881775 /arch/m68k/include/asm/m54xxacr.h
parentm68knommu: support version 2 ColdFire split cache (diff)
downloadlinux-4a5bae416562a8224707a1ff30e83ddab1474fb3.tar.xz
linux-4a5bae416562a8224707a1ff30e83ddab1474fb3.zip
m68knommu: support ColdFire caches that do copyback and write-through
The version 3 and version 4 ColdFire cache controllers support both write-through and copy-back modes on the data cache. Allow for Kconfig time configuration of this, and set the cache mode appropriately. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/m54xxacr.h')
-rw-r--r--arch/m68k/include/asm/m54xxacr.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/m54xxacr.h b/arch/m68k/include/asm/m54xxacr.h
index 6bce82fdb9c3..29d4713f796b 100644
--- a/arch/m68k/include/asm/m54xxacr.h
+++ b/arch/m68k/include/asm/m54xxacr.h
@@ -73,7 +73,11 @@
#else
#define CACHE_MODE (CACR_DEC+CACR_DESB+CACR_DDCM_P+CACR_BEC+CACR_IEC+CACR_EUSP)
#endif
+#if defined(CONFIG_CACHE_COPYBACK)
+#define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_CP)
+#else
#define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_WT)
+#endif
#define INSN_CACHE_MODE (ACR_ENABLE+ACR_ANY)
#define CACHE_INIT (CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)