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authorPhilippe De Muyter <phdm@macqel.be>2010-10-27 14:57:48 +0200
committerGreg Ungerer <gerg@uclinux.org>2011-01-05 06:19:17 +0100
commitb3d75b09bf8998fd302ba339eebbc768a110741b (patch)
treec3273077768dcab76056c4e971f92dff5b5e72ae /arch/m68k/include/asm/m54xxacr.h
parentm68knommu: Create new m54xxacr.h from m5407sim.h subpart (diff)
downloadlinux-b3d75b09bf8998fd302ba339eebbc768a110741b.tar.xz
linux-b3d75b09bf8998fd302ba339eebbc768a110741b.zip
m68knommu: Move __flush_cache_all definition for m54xx in m54xxacr.h
__flush_cache_all for m54xx is intrinsically related to the bit definitions in m54xxacr.h. Move it there from cacheflush_no.h, for easier maintenance. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/m54xxacr.h')
-rw-r--r--arch/m68k/include/asm/m54xxacr.h31
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/m54xxacr.h b/arch/m68k/include/asm/m54xxacr.h
index 424d4a677e43..da713d22dd0f 100644
--- a/arch/m68k/include/asm/m54xxacr.h
+++ b/arch/m68k/include/asm/m54xxacr.h
@@ -40,4 +40,35 @@
#define ACR_CM 0x00000060 /* Cache mode mask */
#define ACR_WPROTECT 0x00000004 /* Write protect */
+#ifndef __ASSEMBLY__
+
+static inline void __m54xx_flush_cache_all(void)
+{
+ /*
+ * Use cpushl to push and invalidate all cache lines.
+ * Gas doesn't seem to know how to generate the ColdFire
+ * cpushl instruction... Oh well, bit stuff it for now.
+ */
+ __asm__ __volatile__ (
+ "nop\n\t"
+ "clrl %%d0\n\t"
+ "1:\n\t"
+ "movel %%d0,%%a0\n\t"
+ "2:\n\t"
+ ".word 0xf468\n\t"
+ "addl #0x10,%%a0\n\t"
+ "cmpl #0x00000800,%%a0\n\t"
+ "blt 2b\n\t"
+ "addql #1,%%d0\n\t"
+ "cmpil #4,%%d0\n\t"
+ "bne 1b\n\t"
+ "movel #0xb6088500,%%d0\n\t"
+ "movec %%d0,%%CACR\n\t"
+ : : : "d0", "a0" );
+}
+
+#define __flush_cache_all() __m54xx_flush_cache_all()
+
+#endif /* __ASSEMBLY__ */
+
#endif /* m54xxacr_h */