diff options
| author | Greg Ungerer <gerg@uclinux.org> | 2011-12-23 15:10:48 +0100 |
|---|---|---|
| committer | Greg Ungerer <gerg@uclinux.org> | 2012-03-05 00:43:05 +0100 |
| commit | 8400ca322e2fb6771d2adfc05a745b8872af038d (patch) | |
| tree | 86f43f450a50d15a6e03d9cef39a83a6304d675b /arch/m68k/include | |
| parent | m68k: merge the MMU and non-MMU versions of process.c (diff) | |
| download | linux-8400ca322e2fb6771d2adfc05a745b8872af038d.tar.xz linux-8400ca322e2fb6771d2adfc05a745b8872af038d.zip | |
m68knommu: make 5206 UART platform addressing consistent
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 5206 UART addressing so that:
. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include')
| -rw-r--r-- | arch/m68k/include/asm/m5206sim.h | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/m68k/include/asm/m5206sim.h b/arch/m68k/include/asm/m5206sim.h index 9015eadd5c00..69722366b084 100644 --- a/arch/m68k/include/asm/m5206sim.h +++ b/arch/m68k/include/asm/m5206sim.h @@ -100,11 +100,11 @@ #define MCFDMA_BASE1 (MCF_MBAR + 0x240) /* Base address DMA 1 */ #if defined(CONFIG_NETtel) -#define MCFUART_BASE1 0x180 /* Base address of UART1 */ -#define MCFUART_BASE2 0x140 /* Base address of UART2 */ +#define MCFUART_BASE0 (MCF_MBAR + 0x180) /* Base address UART0 */ +#define MCFUART_BASE1 (MCF_MBAR + 0x140) /* Base address UART1 */ #else -#define MCFUART_BASE1 0x140 /* Base address of UART1 */ -#define MCFUART_BASE2 0x180 /* Base address of UART2 */ +#define MCFUART_BASE0 (MCF_MBAR + 0x140) /* Base address UART0 */ +#define MCFUART_BASE1 (MCF_MBAR + 0x180) /* Base address UART1 */ #endif /* @@ -112,6 +112,8 @@ */ #define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */ #define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */ +#define MCF_IRQ_UART0 73 /* UART0 */ +#define MCF_IRQ_UART1 74 /* UART1 */ /* * Generic GPIO |